Kaushik Saha

Orcid: 0009-0003-1731-572X

According to our database1, Kaushik Saha authored at least 16 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
A Network Segmentation Architecture for Flow Aggregation and DDoS Mitigation in SDN Using RAPID Flow Rules.
Proceedings of the 25th International Conference on Distributed Computing and Networking, 2024

2023
Efficient Data Transfer Mechanism for DLMS/COSEM Enabled Smart Energy Metering Platform.
SIGMETRICS Perform. Evaluation Rev., April, 2023

DC Signature Analysis Aided Power Source Identification.
Proceedings of the 17th IEEE International Conference on Industrial and Information Systems, 2023

2016
Fourier-Based Feature Extraction for Classification of EEG Signals Using EEG Rhythms.
Circuits Syst. Signal Process., 2016

A 0.5V VMIN 6T SRAM in 28nm UTBB FDSOI Technology Using Compensated WLUD Scheme with Zero Performance Loss.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

2015
The Hilbert spectrum and the Energy Preserving Empirical Mode Decomposition.
CoRR, 2015

The Fourier Decomposition Method for nonlinear and nonstationary time series analysis.
CoRR, 2015

A 6T-SRAM in 28nm FDSOI technology with Vmin of 0.52V using assisted read and write operation.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Low voltage error resilient SRAM using run-time error detection and correction.
Proceedings of the ESSCIRC Conference 2015, 2015

2014
Some studies on nonpolynomial interpolation and error analysis.
Appl. Math. Comput., 2014

2013
PODIA: Power Optimization through Differential Imbalanced Amplifier.
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

Clock and data recovery module in 90nm for 10Gbps serial link with -18dB channel attenuation.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Acceleration of SVD routines in LAPACK.
Proceedings of Eurocon 2013, 2013

2012
FAST detector on many-core computers.
Proceedings of the IEEE Second International Conference on Consumer Electronics - Berlin, 2012

2009
Real-time SVC Decoder in Embedded System.
Proceedings of the SIGMAP 2009, 2009

2006
Current and future trends in embedded VLIW microprocessors applied to multimedia and signal processing.
Proceedings of the 14th European Signal Processing Conference, 2006


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