Kevin Immanuel Gubbi

Orcid: 0000-0003-1745-0457

According to our database1, Kevin Immanuel Gubbi authored at least 13 papers between 2022 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
State of Hardware Fuzzing: Current Methods and the Potential of Machine Learning and Large Language Models.
Proceedings of the 26th International Symposium on Quality Electronic Design, 2025

2024
Optimized and Automated Secure IC Design Flow: A Defense-in-Depth Approach.
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2024

Automated Hardware Logic Obfuscation Framework Using GPT.
CoRR, 2024

Transformers: A Security Perspective.
IEEE Access, 2024

Securing On-Chip Learning: Navigating Vulnerabilities and Potential Safeguards in Spiking Neural Network Architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
Hardware Trojan Detection Using Machine Learning: A Tutorial.
ACM Trans. Embed. Comput. Syst., 2023

HW-V2W-Map: Hardware Vulnerability to Weakness Mapping Framework for Root Cause Analysis with GPT-assisted Mitigation Suggestion.
CoRR, 2023

Advanced Reinforcement Learning Solution for Clock Skew Engineering: Modified Q-Table Update Technique for Peak Current and IR Drop Minimization.
IEEE Access, 2023

Securing AI Hardware: Challenges in Detecting and Mitigating Hardware Trojans in ML Accelerators.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

2022
Neuromorphic-Enabled Security for IoT.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Survey of Machine Learning for Electronic Design Automation.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

LOCK&ROLL: deep-learning power side-channel attack mitigation using emerging reconfigurable devices and logic locking.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Silicon validation of LUT-based logic-locked IP cores.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022


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