Banafsheh S. Latibari
Orcid: 0000-0003-3735-9191
According to our database1,
Banafsheh S. Latibari authored at least 31 papers
between 2022 and 2026.
Collaborative distances:
Collaborative distances:
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Bibliography
2026
IEEE Trans. Artif. Intell., April, 2026
Stealthy Hardware Trojans in AI Accelerators: Attacks on Transformer, Convolutional Neural Network, and Systolic Architectures.
IEEE Micro, 2026
Fine-Grained Patching via Contention Balancer: A Practical Mitigation Strategy for Spectre Vulnerabilities Using SpecScope Contention Maps.
Proceedings of the 27th International Symposium on Quality Electronic Design, 2026
Proceedings of the 27th International Symposium on Quality Electronic Design, 2026
Proceedings of the Great Lakes Symposium on VLSI 2026, 2026
Proceedings of the Great Lakes Symposium on VLSI 2026, 2026
2025
HWREx: AI-enabled Hardware Weakness and Risk Exploration and Storytelling Framework with LLM-assisted Mitigation Suggestion.
ACM Trans. Design Autom. Electr. Syst., November, 2025
CoRR, September, 2025
Integrating Generative AI into Cybersecurity Education: A Study of OCR and Multimodal LLM-assisted Instruction.
CoRR, September, 2025
RAG-PRISM: A Personalized, Rapid, and Immersive Skill Mastery Framework with Adaptive Retrieval-Augmented Tutoring.
CoRR, September, 2025
CoRR, April, 2025
CoRR, January, 2025
Optimizing Vision Transformers: Unveiling 'Focus and Forget' for Enhanced Computational Efficiency.
IEEE Access, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
FaRAccel: FPGA-Accelerated Defense Architecture for Efficient Bit-Flip Attack Resilience in Transformer Models.
Proceedings of the 43rd IEEE International Conference on Computer Design, 2025
Hammering the Diagnosis: Rowhammer-Induced Stealthy Trojan Attacks on ViT-Based Medical Imaging.
Proceedings of the 43rd IEEE International Conference on Computer Design, 2025
Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025
2024
ACM Trans. Archit. Code Optim., September, 2024
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2024
PhD thesis, 2024
Transforming Engineering Education Using Generative AI and Digital Twin Technologies.
CoRR, 2024
Securing On-Chip Learning: Navigating Vulnerabilities and Potential Safeguards in Spiking Neural Network Architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
2023
ACM Trans. Embed. Comput. Syst., 2023
HW-V2W-Map: Hardware Vulnerability to Weakness Mapping Framework for Root Cause Analysis with GPT-assisted Mitigation Suggestion.
CoRR, 2023
Advanced Reinforcement Learning Solution for Clock Skew Engineering: Modified Q-Table Update Technique for Peak Current and IR Drop Minimization.
IEEE Access, 2023
2022
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022
RAPTA: A Hierarchical Representation Learning Solution For Real-Time Prediction of Path-Based Static Timing Analysis.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022