Kiran Thorat
Orcid: 0009-0005-9190-798X
According to our database1,
Kiran Thorat
authored at least 7 papers
between 2022 and 2025.
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Bibliography
2025
LLM-VeriPPA: Power, Performance, and Area Optimization aware Verilog Code Generation with Large Language Models.
Proceedings of the 7th ACM/IEEE Symposium on Machine Learning for CAD, 2025
Proceedings of the International Joint Conference on Neural Networks, 2025
DR-CircuitGNN: Training Acceleration of Heterogeneous Circuit Graph Neural Network on GPUs.
Proceedings of the 39th ACM International Conference on Supercomputing, 2025
2024
CoRR, 2024
2023
Advanced Large Language Model (LLM)-Driven Verilog Development: Enhancing Power, Performance, and Area Optimization in Code Synthesis.
CoRR, 2023
LinGCN: Structural Linearized Graph Convolutional Network for Homomorphically Encrypted Inference.
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
2022
CoDG-ReRAM: An Algorithm-Hardware Co-design to Accelerate Semi-Structured GNNs on ReRAM.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022