Jinwei Tang

According to our database, Jinwei Tang authored at least 5 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Bridging the Last Mile of Circuit Design: PostEDA-Bench, a Hierarchical Benchmark for PPA Convergence and DRC Fixing.

Pengju Liu, Nuo Xu, Jinwei Tang, Yu Cao, Caiwen Ding

CoRR, May, 2026

Privacy-Preserving Constrained Evaluation of LLM-Generated HLS C/C++.

Nuo Xu, Jinwei Tang, Zihang Chen, Xiaolin Xu, Wujie Wen, Zhenman Fang, Caiwen Ding

Proceedings of the Great Lakes Symposium on VLSI 2026, 2026

2025

FHE-Agent: Automating CKKS Configuration for Practical Encrypted Inference via an LLM-Guided Agentic Framework.

Nuo Xu, Zhaoting Gong, Ran Ran, Jinwei Tang, Wujie Wen, Caiwen Ding

CoRR, November, 2025

MAHL: Multi-Agent LLM-Guided Hierarchical Chiplet Design with Adaptive Debugging.

Jinwei Tang, Jiayin Qin, Nuo Xu, Pragnya Sudershan Nalla, Yu Cao, Yang Katie Zhao, Caiwen Ding

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

2024

HiVeGen - Hierarchical LLM-based Verilog Generation for Scalable Chip Design.

Jinwei Tang, Jiayin Qin, Kiran Thorat, Chen Tian, Yu Cao, Yang Zhao, Caiwen Ding

CoRR, 2024