Kiyoshi Shibayama

According to our database, Kiyoshi Shibayama authored at least 21 papers between 1977 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

Design Space Exploration for Implementing a Software-Based Speculative Memory System.

Kohei Fujisawa, Atsushi Nunome, Kiyoshi Shibayama, Hiroaki Hirata

Int. J. Softw. Innov., 2018

2017

An autonomous configuration scheme of storage tiers for distributed file system.

Shingo Shimano, Atsushi Nunome, Yuta Yokoi, Kiyoshi Shibayama, Hiroaki Hirata

Proceedings of the 18th IEEE/ACIS International Conference on Software Engineering, 2017

Performance evaluation of delayed-committing transactional memory.

Sekai Ichii, Shohei Hayashi, Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama

Proceedings of the 18th IEEE/ACIS International Conference on Software Engineering, 2017

A software implementation of speculative memory.

Kohei Fujisawa, Atsushi Nunome, Kiyoshi Shibayama, Hiroaki Hirata

Proceedings of the 18th IEEE/ACIS International Conference on Software Engineering, 2017

2016

An interval control method for status propagation in an autonomous distributed storage system.

Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama

Proceedings of the 15th IEEE/ACIS International Conference on Computer and Information Science, 2016

Speculative memory: An architectural support for explicit speculations in multithreaded programming.

Hiroaki Hirata, Atsushi Nunome, Kiyoshi Shibayama

Proceedings of the 15th IEEE/ACIS International Conference on Computer and Information Science, 2016

2015

A Distributed Storage System with Dynamic Tiering for iSCSI Environment.

Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama

Int. J. Networked Distributed Comput., 2015

A Large-Scale Speculation for the Thread-Level Parallelization.

Yuki Shoji, Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama

Proceedings of the 3rd International Conference on Applied Computing and Information Technology, 2015

An Information Propagation Scheme for an Autonomous Distributed Storage System in iSCSI Environment.

Shingo Shimano, Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama

Proceedings of the 3rd International Conference on Applied Computing and Information Technology, 2015

Hardware Transactional Memory with Delayed-Committing.

Sekai Ichii, Saki Tashiro, Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama

Proceedings of the 3rd International Conference on Applied Computing and Information Technology, 2015

2014

A Lazy-Updating Snoop Cache Protocol for Transactional Memory.

Sekai Ichii, Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama

Proceedings of the IIAI 3rd International Conference on Advanced Applied Informatics, 2014

2010

Development of an e-learning back-end system for code assessment in elementary programming practice.

Atsushi Nunome, Hiroaki Hirata, Masayuki Fukuzawa, Kiyoshi Shibayama

Proceedings of the ACM SIGUCCS Fall Conference on User Services 2010, Norfolk, VA, USA, 2010

2004

Performance evaluation of dynamic load balancing scheme with load prediction mechanism using the load growing acceleration for massively parallel computers.

Atsushi Nunome, Hiroaki Hirata, Haruo Niimi, Kiyoshi Shibayama

Syst. Comput. Jpn., 2004

2002

Evaluation of a data preload mechanism for a linked list structure.

Shuji Yamamura, Tadafumi Kadota, Hiroaki Hirata, Haruo Niimi, Kiyoshi Shibayama

Syst. Comput. Jpn., 2002

1987

KPR: A Logic Programming Language-Oriented Parallel Machine.

Kiyoshi Shibayama, Masaaki Yamamoto, Hiroaki Hirata, Yasushi Konoh, Takanori Sanetoh, Hiroshi Hagiwara

Proceedings of the Logic Programming '87, 1987

1986

A Computer with Low-Level Parallelism QA-2: Its Applications to 3-D Graphics and Prolog/Lisp Machines.

Shinji Tomita, Kiyoshi Shibayama, Toshiyuki Nakata, Shinji Yuasa, Hiroshi Hagiwara

Proceedings of the 13th Annual Symposium on Computer Architecture, Tokyo, Japan, June 1986, 1986

1983

A User-Microprogrammable, Local Host Computer With Low-Level Parallelism

Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Toshiyuki Nakata, Hiroshi Hagiwara

Proceedings of the 10th Annual Symposium on Computer Architecture, 1983, 1983

1980

A Dynamically Microprogammable Computer with Low-Level Parallelism.

Hiroshi Hagiwara, Shinji Tomita, Shigeru Oyanagi, Kiyoshi Shibayama

IEEE Trans. Computers, 1980

Performance evaluation and improvement of a dynamically microprogrammable computer with low-level parallelism.

Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Hiroshi Hagiwara

Proceedings of the 13th annual workshop on Microprogramming, 1980

Performance Evaluation and Improvement of a Dynamically Microprogrammable Computer with Low-Level Parallelism.

Kiyoshi Shibayama, Shinji Tomita, Hiroshi Hagiwara, Katsuhiro Yamazaki, Toshiaki Kitamura

Proceedings of the Information Processing, Proceedings of the 8th IFIP Congress 1980, Tokyo, Japan - October 6-9, 1980 and Melbourne, Australia, 1980

1977

Hardware Organization of a Low Level Parallel Processor.

Shinji Tomita, Kiyoshi Shibayama, Shigeru Oyanagi, Hiroshi Hagiwara

Proceedings of the Information Processing, 1977