Koki Okabe

According to our database, Koki Okabe authored at least 7 papers between 2006 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2009

Performance evaluation of NEC SX-9 using real science and engineering applications.

Takashi Soga, Akihiro Musa, Youichi Shimomura, Ryusuke Egawa, Ken'ichi Itakura, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi

Proceedings of the ACM/IEEE Conference on High Performance Computing, 2009

Performance tuning and analysis of future vector processors based on the roofline model.

Yoshiei Sato, Ryu-ichi Nagaoka, Akihiro Musa, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi

Proceedings of the 10th workshop on MEmory performance, 2009

2008

A shared cache for a chip multi vector processor.

Akihiro Musa, Yoshiei Sato, Takashi Soga, Koki Okabe, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi

Proceedings of the 9th workshop on MEmory performance, 2008

Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture.

Akihiro Musa, Yoshiei Sato, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi

Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2008

First Experiences with NEC SX-9.

Hiroaki Kobayashi, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Akihiko Musa, Takashi Soga, Yoichi Shimomura

Proceedings of the High Performance Computing on Vector Systems 2008, 2008

2007

An on-chip cache design for vector processors.

Akihiro Musa, Yoshiei Sato, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi

Proceedings of the 2007 workshop on MEmory performance, 2007

2006

Implications of Memory Performance for Highly Efficient Supercomputing of Scientific Applications.

Akihiro Musa, Hiroyuki Takizawa, Koki Okabe, Takashi Soga, Hiroaki Kobayashi

Proceedings of the Parallel and Distributed Processing and Applications, 2006