Kotaro Terada

According to our database1, Kotaro Terada authored at least 7 papers between 2007 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A Fully-Connected Ising Model Embedding Method and Its Evaluation for CMOS Annealing Machines.
IEICE Trans. Inf. Syst., 2019

2018
An Ising model mapping to solve rectangle packing problem.
Proceedings of the 2018 International Symposium on VLSI Design, 2018

2017
A Bitwidth-Aware High-Level Synthesis Algorithm Using Operation Chainings for Tiled-DR Architectures.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

2015
A High-Level Synthesis Algorithm with Inter-Island Distance Based Operation Chainings for RDR Architectures.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015

A floorplan-driven high-level synthesis algorithm with multiple-operation chainings based on path enumeration.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
A floorplan-driven high-level synthesis algorithm with operation chainings using chaining enumeration.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2007
<i>In silico </i>panning for a non-competitive peptide inhibitor.
BMC Bioinform., 2007


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