Lars Friebe

According to our database1, Lars Friebe authored at least 9 papers between 2000 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2005
HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing.
VLSI Signal Processing, 2005

A multi-core SoC design for advanced image and video compression.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

2004
HIBRID-SOC: a multi-core architecture for image and video applications.
SIGARCH Computer Architecture News, 2004

2003
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing.
Proceedings of the IFIP VLSI-SoC 2003, 2003

HiBRID-SoC: a multi-core architecture for image and video applications.
Proceedings of the 2003 International Conference on Image Processing, 2003

HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications.
Proceedings of the 2003 Design, 2003

2002
A multi DSP board for real time SAR processing using the HiPAR-DSP 16.
Proceedings of the IEEE International Geoscience and Remote Sensing Symposium, 2002

HiPAR-DSP 16, a scalable highly parallel DSP core for system on a chip video- and image processing applications.
Proceedings of the IEEE International Conference on Acoustics, 2002

2000
A Study of Channeled DRAM Memory Architectures.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000


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