Sören Moch

According to our database1, Sören Moch authored at least 11 papers between 2000 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2009
Memory efficient programmable processor for bitstream processing and entropy decoding of multiple-standard high-bitrate HDTV video bitstreams.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

An Enhanced DMA Controller in SIMD Processors for Video Applications.
Proceedings of the Architecture of Computing Systems, 2009

2005
HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing.
J. VLSI Signal Process., 2005

A multi-core SoC design for advanced image and video compression.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

2004
HIBRID-SOC: a multi-core architecture for image and video applications.
SIGARCH Comput. Archit. News, 2004

A scalable, clustered SMT processor for digital signal processing.
SIGARCH Comput. Archit. News, 2004

2003
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing.
Proceedings of the IFIP VLSI-SoC 2003, 2003

HiBRID-SoC: a multi-core architecture for image and video applications.
Proceedings of the 2003 International Conference on Image Processing, 2003

HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications.
Proceedings of the 2003 Design, 2003

2002
A Large-Area Integrated Multiprocessor System for Video Applications.
IEEE Des. Test Comput., 2002

2000
Implementation of a Multiprocessor System with Distributed Embedded DRAM on a Large Area Integrated Circuit.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000


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