Leona Okamura

According to our database, Leona Okamura authored at least 5 papers between 2011 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

Low-Power On-Chip Charge-Recycling DC-DC Conversion Circuit and System.

Kazuhiro Ueda, Fukashi Morishita, Shunsuke Okura, Leona Okamura, Tsutomu Yoshihara, Kazutami Arimoto

IEEE J. Solid State Circuits, 2013

A 6.72-Gb/s, 8pJ/bit/iteration WPAN LDPC decoder in 65nm CMOS.

Zhixiang Chen, Xiao Peng, Xiongxin Zhao, Leona Okamura, Dajiang Zhou, Satoshi Goto

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2011

An Energy Efficiency 4-bit Multiplier with Two-Phase Non-overlap Clock Driven Charge Recovery Logic.

Yimeng Zhang, Leona Okamura, Tsutomu Yoshihara

IEICE Trans. Electron., 2011

An Area Efficiency Hybrid Decoupling Scheme for Charge Pump Noise Suppression in Non-volatile Memory.

Mengshu Huang, Leona Okamura, Tsutomu Yoshihara

IEICE Trans. Electron., 2011

A 6.72-Gb/s 8 pJ/bit/iteration IEEE 802.15.3c LDPC Decoder Chip.

Zhixiang Chen, Xiao Peng, Xiongxin Zhao, Leona Okamura, Dajiang Zhou, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011