Leonardo Bandeira Soares
Orcid: 0000-0002-4678-9401
According to our database1,
Leonardo Bandeira Soares
authored at least 23 papers
between 2013 and 2022.
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Bibliography
2022
Accuracy-Configurable 2-D Gaussian Filter Architecture for Energy-Efficient Image Processing.
IEEE Des. Test, 2022
Exploring the Impacts of Multiple Kernel Sizes of Gaussian Filters Combined to Approximate Computing in Canny Edge Detection.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022
2021
Design of Energy-Efficient Gaussian Filters by Combining Refactoring and Approximate Adders.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
An Energy-Efficient and Approximate Accelerator Design for Real-Time Canny Edge Detection.
Circuits Syst. Signal Process., 2020
A Fine-grained Methodology for Accuracy-configurable and Energy-efficient Gaussian Filters Design.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
2019
Design Methodology to Explore Hybrid Approximate Adders for Energy-Efficient Image and Video Processing Accelerators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Power-, Area-, and Compression-Efficient Eight-Point Approximate 2-D Discrete Tchebichef Transform Hardware Design Combining Truncation Pruning and Efficient Transposition Buffers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
2018
Exploring power-performance-quality tradeoff of approximate adders for energy efficient sobel filtering.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018
2017
Pruning and approximation of coefficients for power-efficient 2-D Discrete Tchebichef Transform.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017
Exploring the combination of number of bits and number of iterations for a power-efficient fixed-point CORDIC implementation.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017
Exploring the use of parallel prefix adder topologies into approximate adder circuits.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017
2016
A novel pruned-based algorithm for energy-efficient SATD operation in the HEVC coding.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016
Exploiting approximate adder circuits for power-efficient Gaussian and Gradient filters for Canny edge detector algorithm.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
A power-efficient imprecise radix-4 multiplier applied to high resolution audio processing.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
2015
Designing CMOS for Near-Threshold Minimum-Energy Operation and Extremely Wide V-F Scaling.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015
Near-threshold computing for very wide frequency scaling: Approximate adders to rescue performance.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015
Energy-efficient Gaussian filter for image processing using approximate adder circuits.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
2013
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
A fast EMD-based technique for Power Quality signals decomposition, compression, and time-frequency analysis.
Proceedings of the 18th International Conference on Digital Signal Processing, 2013