Lerong Cheng

According to our database, Lerong Cheng authored at least 27 papers between 2004 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2014

Statistical timing and power analysis of VLSI considering non-linear dependence.

Lerong Cheng, Wenyao Xu, Fengbo Ren, Fang Gong, Puneet Gupta, Lei He

Integr., 2014

2012

Fourier Series Approximation for Max Operation in Non-Gaussian and Quadratic Statistical Static Timing Analysis.

Lerong Cheng, Fang Gong, Wenyao Xu, Jinjun Xiong, Lei He, Majid Sarrafzadeh

IEEE Trans. Very Large Scale Integr. Syst., 2012

Statistical Timing and Power Optimization of Architecture and Device for FPGAs.

Lerong Cheng, Wenyao Xu, Fang Gong, Yan Lin, Ho-Yan Wong, Lei He

ACM Trans. Reconfigurable Technol. Syst., 2012

2011

Physically Justifiable Die-Level Modeling of Spatial Variation in View of Systematic Across Wafer Variability.

Lerong Cheng, Puneet Gupta, Costas J. Spanos, Kun Qian, Lei He

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

2010

An Analytical Congestion Model with Bounded-Bend Detours.

Fei He, Lerong Cheng, Xiaoyu Song, Guowu Yang

J. Circuits Syst. Comput., 2010

Design dependent process monitoring for back-end manufacturing cost reduction.

Tuck-Boon Chan, Aashish Pant, Lerong Cheng, Puneet Gupta

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

On confidence in characterization and application of variation models.

Lerong Cheng, Puneet Gupta, Lei He

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

Non-Gaussian Statistical Timing Analysis Using Second-Order Polynomial Fitting.

Lerong Cheng, Jinjun Xiong, Lei He

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Efficient Additive Statistical Leakage Estimation.

Lerong Cheng, Puneet Gupta, Lei He

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Accounting for non-linear dependence using function driven component analysis.

Lerong Cheng, Puneet Gupta, Lei He

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

A fast congestion estimator for routing with bounded detours.

Lerong Cheng, Xiaoyu Song, Guowu Yang, William N. N. Hung, Zhiwei Tang, Shaodi Gao

Integr., 2008

Trace-based framework for concurrent development of process and FPGA architecture considering process variation and reliability.

Lerong Cheng, Yan Lin, Lei He

Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008

2007

Device and Architecture Cooptimization for FPGA Power Reduction.

Lerong Cheng, Fei Li, Yan Lin, Phoebe Wong, Lei He

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Non-Linear Statistical Static Timing Analysis for Non-Gaussian Variation Sources.

Lerong Cheng, Jinjun Xiong, Lei He

Proceedings of the 44th Design Automation Conference, 2007

2006

Congestion estimation for hexagonal routing.

Ming Gu, Fei He, Lerong Cheng, Xiaoyu Song, Guowu Yang

Int. J. Comput. Math., 2006

A combinatorial congestion estimation approach with generalized detours.

Fei He, Xiaoyu Song, Ming Gu, Lerong Cheng, Guowu Yang, Zhiwei Tang, Jiaguang Sun

Comput. Math. Appl., 2006

FPGA Performance Optimization Via Chipwise Placement Considering Process Variations.

Lerong Cheng, Jinjun Xiong, Lei He, Mike Hutton

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005

Digital spectrum of a nonuniformly sampled two-dimensional signal and its reconstruction.

Yih-Chyun Jenq, Lerong Cheng

IEEE Trans. Instrum. Meas., 2005

On Theoretical Upper Bounds for Routing Estimation.

Fei He, Lerong Cheng, Guowu Yang, Xiaoyu Song, Ming Gu, Jia-Guang Sun

J. Univers. Comput. Sci., 2005

Probabilistic Estimation for Routing Space.

Fei He, Ming Gu, Xiaoyu Song, Zhiwei Tang, Guowu Yang, Lerong Cheng

Comput. J., 2005

A Hierachical Method for Wiring and Congestion Prediction.

Fei He, Xiaoyu Song, Lerong Cheng, Guowu Yang, Zhiwei Tang, Ming Gu, Jia-Guang Sun

Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

FPGA device and architecture evaluation considering process variations.

Ho-Yan Wong, Lerong Cheng, Yan Lin, Lei He

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Device and architecture co-optimization for FPGA power reduction.

Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He

Proceedings of the 42nd Design Automation Conference, 2005

2004

Routability checking for three-dimensional architectures.

William N. N. Hung, Xiaoyu Song, T. Kam, Lerong Cheng, Guowu Yang

IEEE Trans. Very Large Scale Integr. Syst., 2004

Congestion estimation for 3-D circuit architectures.

Lerong Cheng, William N. N. Hung, Guowu Yang, Xiaoyu Song

IEEE Trans. Circuits Syst. II Express Briefs, 2004

Congestion Estimation for 3D Routing.

Lerong Cheng, William N. N. Hung, Guowu Yang, Xiaoyu Song

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

A fast congestion estimator for routing with bounded detours.

Lerong Cheng, Xiaoyu Song, Guowu Yang, Zhiwei Tang

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004