Li Wang

Orcid: 0000-0003-3937-8273

Affiliations:
  • Hong Kong University of Science and Technology, Department of Electronic and Computer Engineering, Hong Kong


According to our database1, Li Wang authored at least 12 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Bibliography

2024
A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM-4 Receiver With a Jitter Compensation CDR.
IEEE J. Solid State Circuits, February, 2024

2021
Sensing and Cancellation Circuits for Mitigating EMI-Related Common Mode Noise in High-Speed PAM-4 Transmitter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A 52-Gb/s Sub-1-pJ/bit PAM4 Receiver in 40-nm CMOS for Low-Power Interconnects.
IEEE Open J. Circuits Syst., 2021

A W-Band Single-Antenna FMCW Radar Transceiver With Adaptive Leakage Cancellation.
IEEE J. Solid State Circuits, 2021

2020
A Low-Power PAM4 Receiver With an Adaptive Variable-Gain Rectifier-Based Decoder.
IEEE Trans. Very Large Scale Integr. Syst., 2020

A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Self-Biased PLL-Based Multiphase Clock Generator.
IEEE J. Solid State Circuits, 2020

An RGB-LED Driver with Feed-Forward Equalization Used for PAM-4 Visible Light Communication.
Proceedings of the Machine Learning and Intelligent Communications, 2020

A Real-Time RGB PAM-4 Visible Light Communication System Based on a Transceiver Design with Pre- and Post-equalizations.
Proceedings of the Machine Learning and Intelligent Communications, 2020

2019
Smart Table Applications Based on Magnetic Resonance Wireless Power Transfer.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019

Design of a Real-Time Visible Laser Light Communication System with Basedband in FPGA for High Definition video Transmission.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019

A Dual-Resonance Matching Circuit for Magnetic Resonance Wireless Power Transfer Systems.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019

A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Low-Power Multiphase Clock Generator.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019


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