Lu Wan

According to our database, Lu Wan authored at least 17 papers between 2009 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Semi-automated Thermal Envelope Model Setup for Adaptive Model Predictive Control with Event-triggered System Identification.

Lu Wan, Xiaobing Dai, Torsten Welfonder, Ekaterina Petrova, Pieter Pauwels

CoRR, 2023

Optimal Design of Single-Layer and Multi-Layer Air-Core Inductors Considering Uncertainty Factors.

Lu Wan, Arun D. Khilnani, Xinglong Wu, Xiaokang Liu, Sergio Amedeo Pignari, David W. P. Thomas, Mark Sumner, Flavia Grassi

IEEE Access, 2023

2020

Kansei design method based on product narrative design element analysis.

Lu Wan, Li Lin

Int. J. Arts Technol., 2020

2019

Brain-to-Brain Synchrony and Learning Outcomes Vary by Student-Teacher Dynamics: Evidence from a Real-world Classroom Electroencephalography Study.

Dana Bevilacqua, Ido Davidesco, Lu Wan, Kim Chaloner, Jess Rowland, Mingzhou Ding, David Poeppel, Suzanne Dikker

J. Cogn. Neurosci., 2019

2018

C-Mine: Data Mining of Logic Common Cases for Improved Timing Error Resilience with Energy Efficiency.

Chen-Hsuan Lin, Lu Wan, Deming Chen

ACM Trans. Design Autom. Electr. Syst., 2018

CMOS: Dynamic Multi-key Obfuscation Structure for Strong PUFs.

Jiliang Zhang, Lu Wan

CoRR, 2018

2014

C-Mine: Data Mining of Logic Common Cases for Low Power Synthesis of Better-Than-Worst-Case Designs.

Chen-Hsuan Lin, Lu Wan, Deming Chen

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013

Quantifying cognitive state from EEG using phase synchrony.

Lu Wan, Bilal H. Fadlallah, Andreas Keil, José C. Príncipe

Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

2012

Analysis and optimization of digital circuit dynamic behavior

Lu Wan

PhD thesis, 2012

Analysis of Digital Circuit Dynamic Behavior With Timed Ternary Decision Diagrams for Better-Than-Worst-Case Design.

Lu Wan, Deming Chen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

A Coarse-Grained Reconfigurable Architecture with Compilation for High Performance.

Lu Wan, Chen Dong, Deming Chen

Int. J. Reconfigurable Comput., 2012

CCP: common case promotion for improved timing error resilience with energy efficiency.

Lu Wan, Deming Chen

Proceedings of the International Symposium on Low Power Electronics and Design, 2012

2011

Temperature aware statistical static timing analysis.

Artem Rogachev, Lu Wan, Deming Chen

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

2010

LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization.

Deming Chen, Jason Cong, Yiping Fan, Lu Wan

IEEE Trans. Very Large Scale Integr. Syst., 2010

Analysis of circuit dynamic behavior with timed ternary decision diagram.

Lu Wan, Deming Chen

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

2009

DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior.

Lu Wan, Deming Chen

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

Blueshift: Designing processors for timing speculation from the ground up.

Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey J. Cook, Josep Torrellas, Deming Chen, Craig B. Zilles

Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009