Brian Greskamp

According to our database1, Brian Greskamp authored at least 18 papers between 2005 and 2022.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
The Specialized High-Performance Network on Anton 3.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021


2015
Filtering, Reductions and Synchronization in the Anton 2 Network.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium, 2015

2014

Unifying on-chip and inter-node switching within the Anton 2 network.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

2010
LeadOut: Composing low-overhead frequency-enhancing techniques for single-thread performance in configurable multicores.
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

2009
Improving Per-Thread Performance on CMPs through Timing Speculation
PhD thesis, 2009

The BubbleWrap many-core: popping cores for sequential acceleration.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

Blueshift: Designing processors for timing speculation from the ground up.
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009

2008
EVAL: Utilizing processors with variation-induced timing errors.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008

2007
Estimating design time for system circuits.
Proceedings of the IFIP VLSI-SoC 2007, 2007

A Model for Timing Errors in Processors with Parameter Variation.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Threshold Voltage Variation Effects on Aging-Related Hard Failure Rates.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

2006
Online architectures: A theoretical formulation and experimental prototype.
Microprocess. Microsystems, 2006

CADRE: Cycle-Accurate Deterministic Replay for Hardware Debugging.
Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN 2006), 2006

2005
A Virtual Machine for Merit-Based Runtime Reconfiguration.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005


  Loading...