Lucas Brusamarello

According to our database1, Lucas Brusamarello authored at least 11 papers between 2007 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2012
Compact modeling and simulation of Random Telegraph Noise under non-stationary conditions in the presence of random dopants.
Microelectron. Reliab., 2012

2011
Modeling and simulation of device variability and reliability at the electrical level.
PhD thesis, 2011

Fast and accurate statistical characterization of standard cell libraries.
Microelectron. Reliab., 2011

Statistical characterization of standard cells using design of experiments with response surface modeling.
Proceedings of the 48th Design Automation Conference, 2011

2009
Statistical RTS model for digital circuits.
Microelectron. Reliab., 2009

NBTI-aware technique for transistor sizing of high-performance CMOS gates.
Proceedings of the 10th Latin American Test Workshop, 2009

2008
Probabilistic Approach for Yield Analysis of Dynamic Logic Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

2007
Técnicas probabilísticas para análise de yield em nível elétrico usando propagação de erros e derivadas numéricas.
RITA, 2007

Statistical and Numerical Approach for a Computer efficient circuit yield analysis.
Proceedings of the VLSI-SoC: Advanced Topics on Systems on a Chip, 2007

Obtaining delay distribution of dynamic logic circuits by error propagation at the electrical level.
Proceedings of the IFIP VLSI-SoC 2007, 2007

Yield Analysis by Error Propagation Using Numerical Derivatives Considering WD and D2D variations.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007


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