Philippe Roussel

According to our database1, Philippe Roussel authored at least 29 papers between 1984 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 




Comphy - A compact-physics framework for unified modeling of BTI.
Microelectronics Reliability, 2018

A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability.
Microelectronics Reliability, 2018

LER and spacing variability on BEOL TDDB using E-field mapping: Impact of field acceleration.
Microelectronics Reliability, 2017

Approximating Standard Cell Delay Distributions by Reformulating the Most Probable Failure Point.
Proceedings of the Workshop on Early Reliability Modeling for Aging and Variability in Silicon Systems, 2016

Characterization of time-dependent variability using 32k transistor arrays in an advanced HK/MG technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Origins and implications of increased channel hot carrier variability in nFinFETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Time dependent variability in RMG-HKMG FinFETs: Impact of extraction scheme on stochastic NBTI.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Four point probe ramped voltage stress as an efficient method to understand breakdown of STT-MRAM MgO tunnel junctions.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Impact of time-dependent variability on the yield and performance of 6T SRAM cells in an advanced HK/MG technology.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

The defect-centric perspective of device and circuit reliability - From individual defects to circuits.
Proceedings of the 45th European Solid State Device Research Conference, 2015

Characterization and simulation methodology for time-dependent variability in advanced technologies.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies.
Proceedings of the 44th European Solid State Device Research Conference, 2014

Defect-centric perspective of time-dependent BTI variability.
Microelectronics Reliability, 2012

Fast and accurate statistical characterization of standard cell libraries.
Microelectronics Reliability, 2011

Variability aware modeling for yield enhancement of SRAM and logic.
Proceedings of the Design, Automation and Test in Europe, 2011

Statistical characterization of standard cells using design of experiments with response surface modeling.
Proceedings of the 48th Design Automation Conference, 2011

On the cost-effectiveness of matching repositories of pre-tested wafers for wafer-to-wafer 3D chip stacking.
Proceedings of the 15th European Test Symposium, 2010

Qualitative modelling of a multi-step process: The case of French breadmaking.
Expert Syst. Appl., 2009

Exponent Monte Carlo for Quick Statistical Circuit Simulation.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

Variability aware modeling of SoCs: From device variations to manufactured system yield.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Transient voltage overshoot in TLP testing - Real or artifact?
Microelectronics Reliability, 2007

Gate oxide breakdown in FET devices and circuits: From nanoscale physics to system-level reliability.
Microelectronics Reliability, 2007

Distribution and generation of traps in SiO2/Al2O3 gate stacks.
Microelectronics Reliability, 2007

Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations.
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

Layout dependency induced deviation from Poisson area scaling in BEOL dielectric reliability.
Microelectronics Reliability, 2005

The Birth of Prolog.
Proceedings of the History of Programming Languages Conference (HOPL-II), 1993

Editing First-Order Proofs: Programmed Rules vs Derived Rules.
Proceedings of the 1984 International Symposium on Logic Programming, 1984