Lukasz Lopacinski

Orcid: 0000-0002-2349-298X

According to our database1, Lukasz Lopacinski authored at least 36 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Fully Parallel Fully Unrolled BP Decoding of LDPC and Polar Codes.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2023

Amplitude- and phase-modulated PSSS for wide bandwidth mixed analog-digital baseband processors in THz communication.
Proceedings of the 97th IEEE Vehicular Technology Conference, 2023

2022
Real-Valued Spreading Sequences for PSSS Based High-Speed Wireless Systems.
IEEE Access, 2022

High-Throughput Multi-Frame Decoding of QC-LDPC Codes With Modified Rejection-Based Minimum Finding.
IEEE Access, 2022

Ultra high speed 802.11n LDPC decoder with seven-stage pipeline in 28 nm CMOS.
Proceedings of the 95th IEEE Vehicular Technology Conference, 2022

Early Stopping of BP Polar Decoding Based on Parity-Check Sums.
Proceedings of the 95th IEEE Vehicular Technology Conference, 2022

High-Speed SC Decoder for Polar Codes achieving 1.7 Tb/s in 28 nm CMOS.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

A Hardware Optimized High Throughput LDPC Decoder Supporting 3 Tb/s in 28 nm CMOS.
Proceedings of the 2022 IEEE 33rd Annual International Symposium on Personal, 2022

An Improved Stage-Combined Belief Propagation Decoding of Polar Codes.
Proceedings of the 2022 IEEE 33rd Annual International Symposium on Personal, 2022

1542 Gbps Fully Pipelined Fast-SSC Decoding of Polar Codes.
Proceedings of the 2022 IEEE 33rd Annual International Symposium on Personal, 2022

Advancements in Edge Computing and Service Orchestration in Support of Advanced Surveillance Services.
Proceedings of the Artificial Intelligence Applications and Innovations. AIAI 2022 IFIP WG 12.5 International Workshops, 2022

Ultra High-Speed BP Decoder for Polar Codes achieving 1.4 Tbps in 28 nm CMOS.
Proceedings of the 2022 Joint European Conference on Networks and Communications & 6G Summit, 2022

550 Gbps Fully Parallel Fully Unrolled LDPC Decoder in 28 nm CMOS Technology.
Proceedings of the 2022 Joint European Conference on Networks and Communications & 6G Summit, 2022

2021
Reduced-complexity decoding implementation of QC-LDPC codes with modified shuffling.
EURASIP J. Wirel. Commun. Netw., 2021

OFDM Transmission over a Short-Range 240 GHz Wireless Link: Performance Analysis.
Proceedings of the 25th International ITG Workshop on Smart Antennas, 2021

A Study of Hardware Complexity for PSSS Systems Based on Real-Valued Spreading Sequences.
Proceedings of the 94th IEEE Vehicular Technology Conference, 2021

Modulation and Coding Schemes for Variable-Rate Parallel Sequence Spread Spectrum.
Proceedings of the 32nd IEEE Annual International Symposium on Personal, 2021

Investigation of Real-Valued Spreading Sequences for DSSS and PSSS.
Proceedings of the 17th International Symposium on Wireless Communication Systems, 2021

A Study of Barker Spreading Codes for High-Speed PSSS Wireless Systems.
Proceedings of the Joint European Conference on Networks and Communications & 6G Summit, 2021

2020
A Modified Rejection-Based Architecture to Find the First Two Minima in Min-Sum-Based LDPC Decoders.
Proceedings of the 2020 IEEE Wireless Communications and Networking Conference, 2020

2019
Data Link Layer Processor for 100 Gbps Terahertz Wireless Communications in 28 nm CMOS Technology.
IEEE Access, 2019

A Modified Shuffling Method to Split the Critical Path Delay in Layered Decoding of QC-LDPC Codes.
Proceedings of the 30th IEEE Annual International Symposium on Personal, 2019

An Unnoticed Property in QC-LDPC Codes to Find the Message from the Codeword in Non-Systematic Codes.
Proceedings of the European Conference on Networks and Communications, 2019

Modular Data Link Layer Processing for THz communication.
Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

2018
Implementation of a Multi-Core Data Link Layer Processor for THz Communication.
Proceedings of the 87th IEEE Vehicular Technology Conference, 2018

100 Gbit/s End-to-End Communication: Adding Flexibility with Protocol Templates.
Proceedings of the 43rd IEEE Conference on Local Computer Networks, 2018

2017
Data Link Layer Considerations for Future 100 Gbps Terahertz Band Transceivers.
Wirel. Commun. Mob. Comput., 2017

Verbesserung des Durchsatzes von drahtlosen Hochgeschwindigkeitskommunikationen.
Proceedings of the Ausgezeichnete Informatikdissertationen 2017, 2017

Towards 100 Gbps wireless communication: Investigation of FEC interleavers for PSSS-15 spreading.
Proceedings of the IEEE EUROCON 2017 -17th International Conference on Smart Technologies, 2017

2016
Improved turbo product coding dedicated for 100 Gbps wireless terahertz communication.
Proceedings of the 27th IEEE Annual International Symposium on Personal, 2016

100 Gbit/s End-to-End Communication: Designing Scalable Protocols with Soft Real-Time Stream Processing.
Proceedings of the 41st IEEE Conference on Local Computer Networks, 2016

Towards 100 Gbps wireless communication: Energy efficiency of ARQ, FEC, and RF-frontends.
Proceedings of the International Symposium on Wireless Communication Systems, 2016

2015
Challenges for 100 Gbit/s end to end communication: Increasing throughput through parallel processing.
Proceedings of the 40th IEEE Conference on Local Computer Networks, 2015

Parallel RS Error Correction Structures Dedicated for 100 Gbps Wireless Data Link Layer.
Proceedings of the IEEE International Conference on Ubiquitous Wireless Broadband, 2015

Design and Implementation of an Adaptive Algorithm for Hybrid Automatic Repeat Request.
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

2010
Low power sensor node processor architecture.
Proceedings of the 17th IEEE International Conference on Electronics, 2010


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