Oliver Schrape

According to our database, Oliver Schrape authored at least 44 papers between 2009 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Methodology for standard cell-based design and implementation of reliable and robust hardware systems (Methoden für Standardzellbasiertes Design und Implementierung zuverlässiger und robuster Hardware Systeme)

Oliver Schrape

PhD thesis, 2023

SET and SEU Hardened Clock Gating Cell.

Marko S. Andjelkovic, Oliver Schrape, Anselm Breitenreiter, Milos Krstic

Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

2022

Analysis of Single Event Transient Effects in Standard Delay Cells Based on Decoupling Capacitors.

Marko S. Andjelkovic, Milos Marjanovic, Bojan Drasko, Cristiano Calligaro, Oliver Schrape, Umberto Gatti, Felipe A. Kuentzer, Stefan D. Ilic, Goran S. Ristic, Milos Krstic

J. Circuits Syst. Comput., December, 2022

A design concept for radiation hardened RADFET readout system for space applications.

Marko S. Andjelkovic, Aleksandar Simevski, Junchao Chen, Oliver Schrape, Zoran Stamenkovic, Milos Krstic, Stefan D. Ilic, Goran S. Ristic, Aleksandar Jaksic, Nikola Vasovic, Russell Duane, Alberto J. Palma, Antonio M. Lallena, Miguel A. Carvajal

Microprocess. Microsystems, April, 2022

Fast Error Propagation Probability Estimates by Answer Set Programming and Approximate Model Counting.

Anselm Breitenreiter, Marko S. Andjelkovic, Oliver Schrape, Milos Krstic

IEEE Access, 2022

Ultra high speed 802.11n LDPC decoder with seven-stage pipeline in 28 nm CMOS.

Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Oliver Schrape, Jesús Gutiérrez, Milos Krstic, Eckhard Grass, Rolf Kraemer

Proceedings of the 95th IEEE Vehicular Technology Conference, 2022

Ultra High-Speed BP Decoder for Polar Codes achieving 1.4 Tbps in 28 nm CMOS.

Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Oliver Schrape, Jesús Gutiérrez, Milos Krstic, Eckhard Grass

Proceedings of the 2022 Joint European Conference on Networks and Communications & 6G Summit, 2022

2021

Design and Evaluation of Radiation-Hardened Standard Cell Flip-Flops.

Oliver Schrape, Marko S. Andjelkovic, Anselm Breitenreiter, Steffen Zeidler, Alexey Balashov, Milos Krstic

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Monitoring of Particle Flux and LET Variations with Pulse Stretching Inverters.

Marko S. Andjelkovic, Junchao Chen, Aleksandar Simevski, Oliver Schrape, Milos Krstic, Rolf Kraemer

CoRR, 2021

Machine Learning Approach for Accelerating Simulation-based Fault Injection.

Li Lu, Junchao Chen, Anselm Breitenreiter, Oliver Schrape, Markus Ulbricht, Milos Krstic

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

Radiation-Hardness-by-Design Latch-based Triple Modular Redundancy Flip-Flops.

Oliver Schrape, Anselm Breitenreiter, Carsten Schulze, Steffen Zeidler, Milos Krstic

Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

Reliability Analysis in Less than 200 Lines of Code.

Anselm Breitenreiter, Oliver Schrape, Marko S. Andjelkovic, Milos Krstic

Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

Power- and Area-optimized Neural Network IC-Design for Academic Education.

Florian Frankreiter, Anselm Breitenreiter, Oliver Schrape, Milos Krstic

Proceedings of the 28th IEEE International Conference on Electronics, 2021

A Tunable Single Event Transient Filter Based on Digitally Controlled Capacitive Delay Cells.

Marko S. Andjelkovic, Oliver Schrape, Anselm Breitenreiter, Junchao Chen, Milos Krstic

Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021

2020

R-Abax: A Radiation Hardening Legalisation Algorithm Satisfying TMR Spacing Constraints.

Christos Georgakidis, Christos P. Sotiriou, Nikolaos Sketopoulos, Milos Krstic, Oliver Schrape, Anselm Breitenreiter

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

PISA: Power-robust Multiprocessor Design for Space Applications.

Aleksandar Simevski, Oliver Schrape, Carlos Benito, Milos Krstic, Marko S. Andjelkovic

Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020

Characterization of Single Event Transient Effects in Standard Delay Cells.

Marko S. Andjelkovic, Oliver Schrape, Anselm Breitenreiter, Milos Krstic, Rolf Kraemer

Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

Design Concept for Radiation-Hardening of Triple Modular Redundancy TSPC Flip-Flops.

Oliver Schrape, Marko S. Andjelkovic, Anselm Breitenreiter, Alexey Balashov, Milos Krstic

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

Design of Radiation Hardened RADFET Readout System for Space Applications.

Marko S. Andjelkovic, Aleksandar Simevski, Junchao Chen, Oliver Schrape, Zoran Stamenkovic, Milos Krstic, Stefan D. Ilic, Luka Spahic, Laza Kostic, Goran S. Ristic, Aleksandar Jaksic, Alberto J. Palma, Antonio M. Lallena, Miguel Angel Carvaja

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

A Glitch-free Clock Multiplexer for Non-Continuously Running Clocks.

Steffen Zeidler, Oliver Schrape, Anselm Breitenreiter, Milos Krstic

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

Radiation Hardened Click Controllers for Soft Error Resilient Asynchronous Architectures.

Felipe A. Kuentzer, Moisés Herrera, Oliver Schrape, Peter A. Beerel, Milos Krstic

Proceedings of the 26th IEEE International Symposium on Asynchronous Circuits and Systems, 2020

2019

Selective Fault Tolerance by Counting Gates with Controlling Value.

Anselm Breitenreiter, Stefan Weidling, Oliver Schrape, Steffen Zeidler, Pedro Reviriego, Milos Krstic

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Aspects on Timing Modeling of Radiation-Hardness by Design Standard Cell-Based △TMR Flip-Flops.

Oliver Schrape, Anselm Breitenreiter, Steffen Zeidler, Milos Krstic

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018

Master-Clone Placement with Individual Clock Tree Implementation - a Case on Physical Chip Design.

Oliver Schrape, Alexey Balashov, Aleksandar Simevski, Carlos Benito, Milos Krstic

Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018

A Radiation Hardened 16 GS/s Arbitrary Waveform Generator IC for a Submillimeter Wave Chirp-Transform Spectrometer.

P. Ostrovsky, Oliver Schrape, Klaus Tittelbach-Helmrich, Frank Herzel, Gunter Fischer, D. Hellmann, P. Borner, A. Loose, P. Hartogh, Dietmar Kissinger

Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018

Use of Decoupling Cells for Mitigation of SET Effects in CMOS Combinational Gates.

Marko S. Andjelkovic, Milan Babic, Yuanqing Li, Oliver Schrape, Milos Krstic, Rolf Kraemer

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Interfacing 3D-stacked Electronic and Optical NoCs with Mixed CMOS-ECL Bridges: a Realistic Preliminary Assessment.

Mahdi Tala, Oliver Schrape, Milos Krstic, Davide Bertozzi

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

D-SET Mitigation Using Common Clock Tree Insertion Techniques for Triple-Clock TMR Flip-Flop.

Oliver Schrape, Anselm Breitenreiter, Marko S. Andjelkovic, Milos Krstic

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Flip-Flop SEUs Mitigation through Partial Hardening of Internal Latch and Adjustment of Clock Duty Cycle.

Yuanqing Li, Anselm Breitenreiter, Marko S. Andjelkovic, Oliver Schrape, Milos Krstic

Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

Exploring the Performance-Energy Optimization Space of a Bridge Between 3D-Stacked Electronic and Optical Networks-on-Chip.

Mahdi Tala, Oliver Schrape, Milos Krstic, Davide Bertozzi

Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018

2017

A single chip 16 GS/s arbitrary waveform generator in 0.13 μm BiCMOS technology.

P. Ostrovsky, Klaus Tittelbach-Helmrich, Frank Herzel, Oliver Schrape, Gunter Fischer, Dietmar Kissinger, P. Borner, A. Loose, D. Hellmann, P. Hartogh

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017

Routing approach for digital, differential bipolar designs using virtual fat-wire boundary pins.

Oliver Schrape, Manuel Herrmann, Frank Winkler, Milos Krstic

Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

2016

Frequency-Domain Optimization of Digital Switching Noise Based on Clock Scheduling.

Xin Fan, Mikkel B. Stegmann, Oliver Schrape, Steffen Zeidler, Isac G. Jensen, Jannich Thorsen, Tobias Bjerregaard, Milos Krstic

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

An Early Stage Design Flow for Switching Noise Attenuation.

Steffen Zeidler, Xin Fan, Oliver Schrape, Milos Krstic

J. Circuits Syst. Comput., 2016

Implementation of DBFN processor for Synthetic Aperture Radar application.

Oliver Schrape, Arkadiusz Koczor, Piotr Penkala, Vladimir Petrovic, Milos Krstic

Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

2015

A Design Preconditioning Flow for Low-Noise Circuits.

Steffen Zeidler, Xin Fan, Oliver Schrape, Milos Krstic

Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

2014

Low-power design methodology for CML and ECL circuits.

Oliver Schrape, Markus Appel, Frank Winkler, Milos Krstic

Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

2013

TNODE: A low power sensor node processor for secure wireless networks.

Goran Panic, Oliver Schrape, Thomas Basmer, Frank Vater, Klaus Tittelbach-Helmrich

Proceedings of the 2013 International Symposium on System on Chip, 2013

A 12 Gb/s standard cell based ECL 4: 1 serializer with asynchronous parallel interface.

Oliver Schrape, Markus Appel, Frank Winkler, Milos Krstic

Proceedings of the 20th IEEE International Conference on Electronics, 2013

GALS Design for Spectral Peak Attenuation of Switching Current.

Xin Fan, Oliver Schrape, Miroslav Marinkovic, Peter Dahnert, Milos Krstic, Eckhard Grass

Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

2012

Embedded low power clock generator for sensor nodes.

Oliver Schrape, Frank Vater

Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012

2011

Sensor node processor for security applications.

Goran Panic, Thomas Basmer, Oliver Schrape, Steffen Peter, Frank Vater, Klaus Tittelbach-Helmrich

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010

An All-Digital Phase-Locked Loop with High Resolution for Local On-Chip Clock Synthesis.

Oliver Schrape, Frank Winkler, Steffen Zeidler, Markus Petri, Eckhard Grass, Ulrich Jagdhold

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010

2009

HDL-Synthese und Simulation von Hochgeschwindigkeits-Digitalschaltungen mit gemischten CMOS- und ECL-Bibliotheken.

Frank Winkler, Gerald Kell, Oliver Schrape, Hans Gustat, Ulrich Jagdhold

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2009