Goran Panic

Orcid: 0000-0002-3702-0828

According to our database1, Goran Panic authored at least 31 papers between 2003 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2022
Real-Valued Spreading Sequences for PSSS Based High-Speed Wireless Systems.
IEEE Access, 2022

High-Throughput Multi-Frame Decoding of QC-LDPC Codes With Modified Rejection-Based Minimum Finding.
IEEE Access, 2022

Ultra high speed 802.11n LDPC decoder with seven-stage pipeline in 28 nm CMOS.
Proceedings of the 95th IEEE Vehicular Technology Conference, 2022

High-Speed SC Decoder for Polar Codes achieving 1.7 Tb/s in 28 nm CMOS.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

A Hardware Optimized High Throughput LDPC Decoder Supporting 3 Tb/s in 28 nm CMOS.
Proceedings of the 2022 IEEE 33rd Annual International Symposium on Personal, 2022

On the SCA Resistance of Crypto IP Cores.
Proceedings of the 23rd IEEE Latin American Test Symposium, 2022

Ultra High-Speed BP Decoder for Polar Codes achieving 1.4 Tbps in 28 nm CMOS.
Proceedings of the 2022 Joint European Conference on Networks and Communications & 6G Summit, 2022

550 Gbps Fully Parallel Fully Unrolled LDPC Decoder in 28 nm CMOS Technology.
Proceedings of the 2022 Joint European Conference on Networks and Communications & 6G Summit, 2022

2021
Classification of Space Particle Events using Supervised Machine Learning Algorithms.
Proceedings of the 8th IEEE International Conference on Data Science and Advanced Analytics, 2021

2019
Data Link Layer Processor for 100 Gbps Terahertz Wireless Communications in 28 nm CMOS Technology.
IEEE Access, 2019

Modular Data Link Layer Processing for THz communication.
Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

2018
Implementation of a Multi-Core Data Link Layer Processor for THz Communication.
Proceedings of the 87th IEEE Vehicular Technology Conference, 2018

2017
Low-Complexity Framework for Movement Classification Using Body-Worn Sensors.
IEEE Trans. Very Large Scale Integr. Syst., 2017

2016
An Embedded Sensor Node Microcontroller with Crypto-Processors.
Sensors, 2016

2015
Möglichkeiten der Nutzung von RRAM in Low-Power Microcontrollern.
Proceedings of the 45. Jahrestagung der Gesellschaft für Informatik, Informatik, Energie und Umwelt, INFORMATIK 2015, Cottbus, Germany, September 28, 2015

Low Power Design Techniques.
Proceedings of the 45. Jahrestagung der Gesellschaft für Informatik, Informatik, Energie und Umwelt, INFORMATIK 2015, Cottbus, Germany, September 28, 2015

Activity Profiling and Power Estimation for Embedded Wireless Sensor Node Design.
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

2014
Fuzzy XML and prioritized fuzzy XQuery with implementation.
J. Intell. Fuzzy Syst., 2014

2013
TNODE: A low power sensor node processor for secure wireless networks.
Proceedings of the 2013 International Symposium on System on Chip, 2013

2012
Design of a sensor node crypto processor for IEEE 802.15.4 applications.
Proceedings of the IEEE 25th International SOC Conference, 2012

The all IHP sensor node: highly integrated sensor nodes using IHP components.
Proceedings of the 10th ACM International Symposium on Mobility Management and Wireless Access, 2012

Fuzzy XML with Implementation.
Proceedings of the Local Proceedings of the Fifth Balkan Conference in Informatics, 2012, 2012

2011
Performance Investigation on an MIMO-capable 802.11a Compliant MAC Protocol Implementation.
Proceedings of the Seventh International Conference on Mobile Ad-hoc and Sensor Networks, 2011

Sensor node processor for security applications.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010
Performance evaluation of channel coding for Gbps 60-GHz OFDM-based wireless communications.
Proceedings of the IEEE 21st International Symposium on Personal, 2010

Low power sensor node processor architecture.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2008
An Encryption-Enabled Network Protocol Accelerator.
Proceedings of the Wired/Wireless Internet Communications, 6th International Conference, 2008

Power gating in wireless sensor networks.
Proceedings of the Third International Symposium on Wireless Pervasive Computing, 2008

Architecture of a Power-Gated Wireless Sensor Node.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

A System-On-Chip for Wireless Body Area Sensor Network Node.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2003
A System-on-Chip Implementation of the IEEE 802.11a MAC Layer.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003


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