Lung-Yen Chen

According to our database, Lung-Yen Chen authored at least 5 papers between 2016 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Neural Network Training With Stochastic Hardware Models and Software Abstractions.

Bonan Zhang, Lung-Yen Chen, Naveen Verma

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A Maximally Row-Parallel MRAM In-Memory-Computing Macro Addressing Readout Circuit Sensitivity and Area.

Peter Deaville, Bonan Zhang, Lung-Yen Chen, Naveen Verma

Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

2019

A 3-D IC for Mitigating Energy of Memory Accessing and Data Movement in Accelerator- Based Streaming Architectures.

Lung-Yen Chen, Sen Tao, Naveen Verma

IEEE J. Solid State Circuits, 2019

Stochastic Data-driven Hardware Resilience to Efficiently Train Inference Models for Stochastic Hardware Implementations.

Bonan Zhang, Lung-Yen Chen, Naveen Verma

Proceedings of the IEEE International Conference on Acoustics, 2019

2016

Delay/Power Modeling and Optimization of FinFET Circuit Modules under PVT Variations: Observing the Trends between the 22nm and 14nm Technology Nodes.

Aoxiang Tang, Xun Gao, Lung-Yen Chen, Niraj K. Jha

ACM J. Emerg. Technol. Comput. Syst., 2016