Peter Deaville

According to our database, Peter Deaville authored at least 7 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation.

Saion K. Roy, Han-Mo Ou, Mostafa Gamal Ahmed, Peter Deaville, Bonan Zhang, Naveen Verma, Pavan Kumar Hanumolu, Naresh R. Shanbhag

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A 256-kb Fully Row/Column-parallel 22nm MRAM In-Memory-Computing Macro with Differential Readout for Robust Parallelization and Scale-up.

Peter Deaville, Bonan Zhang, Naveen Verma

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2022

A 22nm 128-kb MRAM Row/Column-Parallel In-Memory Computing Macro with Memory-Resistance Boosting and Multi-Column ADC Readout.

Peter Deaville, Bonan Zhang, Naveen Verma

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Statistical computing framework and demonstration for in-memory computing systems.

Bonan Zhang, Peter Deaville, Naveen Verma

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

A Maximally Row-Parallel MRAM In-Memory-Computing Macro Addressing Readout Circuit Sensitivity and Area.

Peter Deaville, Bonan Zhang, Lung-Yen Chen, Naveen Verma

Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

2019

MADS: A Framework for Design and Implementation of Adaptive Digital Predistortion Systems.

Lin Li, Peter Deaville, Adrian E. Sapio, Lauri Anttila, Mikko Valkama, Marilyn Wolf, Shuvra S. Bhattacharyya

IEEE J. Emerg. Sel. Topics Circuits Syst., 2019

A Framework for Design and Implementation of Adaptive Digital Predistortion Systems.

Lin Li, Peter Deaville, Adrian E. Sapio, Lauri Anttila, Mikko Valkama, Marilyn Wolf, Shuvra S. Bhattacharyya

Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019