Bonan Zhang
Orcid: 0000-0003-0605-6032
According to our database1,
Bonan Zhang
authored at least 8 papers
between 2019 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
A 256-kb Fully Row/Column-parallel 22nm MRAM In-Memory-Computing Macro with Differential Readout for Robust Parallelization and Scale-up.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
2022
A 22nm 128-kb MRAM Row/Column-Parallel In-Memory Computing Macro with Memory-Resistance Boosting and Multi-Column ADC Readout.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
A Maximally Row-Parallel MRAM In-Memory-Computing Macro Addressing Readout Circuit Sensitivity and Area.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021
Proceedings of the Cyberspace Safety and Security - 13th International Symposium, 2021
2019
Stochastic Data-driven Hardware Resilience to Efficiently Train Inference Models for Stochastic Hardware Implementations.
Proceedings of the IEEE International Conference on Acoustics, 2019