Mahdi Parvizi

Orcid: 0000-0003-4848-9469

According to our database1, Mahdi Parvizi authored at least 20 papers between 2009 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2021
An Area-Efficient High-Resolution Segmented ΣΔ-DAC for Built-In Self-Test Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2021

New Charge-Steering DFEs in 55-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Silicon Photonic Mach-Zehnder Modulator Driver for 800+Gb/s Optical Links.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2021

2020
Optimized Periodic ΣΔ Bitstreams for DC Signal Generation Used in Dynamic Calibration Applications.
IEEE Open J. Circuits Syst., 2020

Using Optimized Butterworth-Based ΣΔ Bitstreams for the Testing of High-Resolution Data Converters.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

Study on the Compensation of Silicon Photonics-Based Modulators in DCI Applications.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Partial Pre-Emphasis for Pluggable 400 G Short-Reach Coherent Systems.
Future Internet, 2019

Selecting the Fastest Settling-Time Filter in PDM-based DACs used for Dynamic Calibration Applications.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

On the Design of DACs for Dynamic Calibration Applications using Periodic Sequences from ΣΔ Modulators.
Proceedings of the 2019 IEEE Canadian Conference of Electrical and Computer Engineering, 2019

A 60 GS/s 8-b DAC with > 29.5dB SINAD up to Nyquist frequency in 7nm FinFET CMOS.
Proceedings of the 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019

2018
A coherent subsampling test system arrangement suitable for phase domain measurements.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018

Ultra-Broadband and Ultra-Compact Optical 90° Hybrid Based on 2×4 MMI Coupler with Subwavelength Gratings on Silicon-on-Insulator.
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

New Charge-Steering Latches in 28nm CMOS for Use in High-Speed Wireline Transceivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2016
Short Channel Output Conductance Enhancement Through Forward Body Biasing to Realize a 0.5 V 250 µW 0.6-4.2 GHz Current-Reuse CMOS LNA.
IEEE J. Solid State Circuits, 2016

2015
A Sub-mW, Ultra-Low-Voltage, Wideband Low-Noise Amplifier Design Technique.
IEEE Trans. Very Large Scale Integr. Syst., 2015

A hybrid COA$ε$-constraint method for solving multi-objective problems.
CoRR, 2015

2013
A 0.4V ultra low-power UWB CMOS LNA employing noise cancellation.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
An ultra low power, low voltage CMOS squarer circuit for non-coherent IR-UWB receivers.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2010
Low-power highly linear UWB CMOS mixer with simultaneous second- and third-order distortion cancellation.
Microelectron. J., 2010

2009
Highly linear common-gate mixer employing intrinsic second and third order distortion cancellation.
IEICE Electron. Express, 2009


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