Calvin Plett

Orcid: 0000-0003-0524-1850

According to our database1, Calvin Plett authored at least 52 papers between 1994 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
High Speed DMT for 224 Gb/s and Faster Wireline Transmission.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2023

2021
New Charge-Steering DFEs in 55-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2018
On-Chip Automatic LC Tuner for RFID Tags Based on Negative Resistances.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Reduced-Size On-Wafer Inductors using Slow Wave Techniques.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

New Charge-Steering Latches in 28nm CMOS for Use in High-Speed Wireline Transceivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2015
A 0.009-1.4-GHz Frequency Synthesizer With Suppressed Transients During VCO Band Switching.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

Analysis and Modeling of the Phase Detector Hysteresis in Bang-Bang PLLs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014
Impact of ESD Protection and Power Supply Decoupling on 10 GHz Low Noise Amplifier.
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

Electrostatic discharge protection for a 10 GHz low noise amplifier.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

2013
A Switchless Multiband Impedance Matching Technique Based on Multiresonant Circuits.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

2012
Modified TSPC clock dividers for higher frequency division by 3 and lower power operation.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Highly reconfigurable single-ended low noise amplifier for software defined radio applications.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

2010
A differential 5<sup>th</sup> derivative Gaussian pulse generator for UWB transceivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A low power DC-DC converter for scavenged power wireless sensor networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A 40 Gb/s transimpedance amplifier in 65 nm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A low power ultra-wideband CMOS LNA for 3.1-10.6-GHz wireless receivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
Low-power CMOS transceivers with on-chip antennas for short-range radio-frequency communication.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

A low-power 0.4-22GHz CMOS cascode distributed amplifier for optical communication systems.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
A 5.2-GHz BFSK Transceiver Using Injection-Locking and an On-Chip Antenna.
IEEE J. Solid State Circuits, 2008

2006
A 0.18-$muhbox m$CMOS Analog Min-Sum Iterative Decoder for a (32, 8) Low-Density Parity-Check (LDPC) Code.
IEEE J. Solid State Circuits, 2006

Design and Characterization of a 5.2 GHz/2.4 GHz ΣΔ Fractional-N Frequency Synthesizer for Low-Phase Noise Performance.
EURASIP J. Wirel. Commun. Netw., 2006

Using MEMS Capacitive Switches in Tunable RF Amplifiers.
EURASIP J. Wirel. Commun. Netw., 2006

5.2 GHz self-powered lock and roll radio using VCO injection-locking and on-chip antennas.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A 0.13µm CMOS delay cell for 40 Gb/s FFE equalization.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Silicon Differential Antenna/Inductor for Short Range Wireless Communication Applications.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

2005
Physical resource binding for a coarse-grain reconfigurable array using evolutionary algorithms.
IEEE Trans. Very Large Scale Integr. Syst., 2005

EM and substrate coupling in silicon RFICs.
IEEE J. Solid State Circuits, 2005

A high-speed analog min-sum iterative decoder.
Proceedings of the 2005 IEEE International Symposium on Information Theory, 2005

A low voltage CMOS multiplier for high frequency equalization.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 1.2V CMOS multiplier for 10 Gbit/s equalization.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

An 80-Mb/s 0.18-μm CMOS analog min-sum iterative decoder for a (32, 8, 10) LDPC code.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

Design and characterization of a MEMS capacitive switch for improved RF amplifier circuits.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

A 15 GHz, 1.8V, variable-gain, modified Cherry-Hooper amplifier.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
RF circuit implications of moderate inversion enhanced linear region in MOSFETs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004

A low-voltage 40-GHz complementary VCO with 15% frequency tuning range in SOI CMOS technology.
IEEE J. Solid State Circuits, 2004

A 5 GHz direct-conversion receiver with DC offset correction.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Gain bandwidth considerations in fully integrated distributed amplifiers implemented in silicon.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Physical Resource Binding for a Coarse Grain Reconfigurable Array.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

Analysis and measurements of EM and substrate coupling effects in common RF integrated circuits.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003
A study of digital and analog automatic-amplitude control circuitry for voltage-controlled oscillators.
IEEE J. Solid State Circuits, 2003

Design of wide-band CMOS VCO for multiband wireless LAN applications.
IEEE J. Solid State Circuits, 2003

Design of high gain fully-integrated distributed amplifiers in 0.35 μm CMOS.
Proceedings of the ESSCIRC 2003, 2003

2002
A low-voltage multi-GHz VCO with 58% tuning range in SOI CMOS.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001
A completely integrated 2 GHz VCO with post-processed Cu inductors.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

A differential bipolar quasi-passive cyclic digital-to-analog converter with 4.416 MSps conversion rate and -77 dB THD.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000
The effect of varactor nonlinearity on the phase noise of completely integrated VCOs.
IEEE J. Solid State Circuits, 2000

A receive path ΔΣ frequency to digital converter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
6.5 mW CMOS low noise amplifier at 1.9 GHz.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998
An agile ISM band frequency synthesizer with built-in GMSK data modulation.
IEEE J. Solid State Circuits, 1998

1995
Bit-Error Rate Measurements for A High Frequency Interpolated Frequency-Hopping Spread-Spectrum System.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A Sigma-Delta Frequency Discriminator Based Synthesizer.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
Self-tuned continuous-time notch filters.
J. VLSI Signal Process., 1994


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