Mahesh Poolakkaparambil

According to our database, Mahesh Poolakkaparambil authored at least 6 papers between 2011 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2015

A Low-Complexity Multiple Error Correcting Architecture Using Novel Cross Parity Codes Over GF(2^m).

Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan

IEEE Trans. Very Large Scale Integr. Syst., 2015

2012

An Investigation of Concurrent Error Detection over Binary Galois Fields in CNTFET and QCA Technologies.

Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Saraju P. Mohanty

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

Low complexity cross parity codes for multiple and random bit error correction.

Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Saraju P. Mohanty

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2011

BCH code based multiple bit error correction in finite field multiplier circuits.

Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan, Saraju P. Mohanty

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

Towards robust nano-CMOS sense amplifier design: a dual-threshold versus dual-oxide perspective.

Oghenekarho Okobiah, Saraju P. Mohanty, Elias Kougianos, Mahesh Poolakkaparambil

Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

A dynamically error correctable bit parallel Montgomery multiplier over binary extension fields.

Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011