Maike Taddiken

Affiliations:
  • University of Bremen, Germany


According to our database1, Maike Taddiken authored at least 15 papers between 2014 and 2019.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Charge-Based Model for Reliability Analysis Flow of Flip- Flops under Process Variation and Aging.
Proceedings of the 16th International Conference on Synthesis, 2019

2018
Design for reliability of generic sensor interface circuits.
Microelectron. Reliab., 2018

On-line monitoring and error correction in sensor interface circuits using digital calibration techniques.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018

ReSeMBleD-Methods for Response Surface Model Behavioral Description.
Proceedings of the 15th International Conference on Synthesis, 2018

LUT-Based Stochastic Modeling for Non-Normal Performance Distributions.
Proceedings of the 15th International Conference on Synthesis, 2018

Yield Approximation of Analog Integrated Circuits Under Time-Dependent Variability.
Proceedings of the 15th International Conference on Synthesis, 2018

2017
Variation- and degradation-aware stochastic behavioral modeling of analog circuit components.
Proceedings of the 14th International Conference on Synthesis, 2017

Behavioral modeling of a sensor interface circuit including various non-idealities.
Proceedings of the 14th International Conference on Synthesis, 2017

2016
Analysis of aging effects - From transistor to system level.
Microelectron. Reliab., 2016

Degradation and temperature analysis of voltage-controlled ring oscillators for robust and reliable oscillator designs in a 65nm bulk CMOS process.
Proceedings of the 2016 MIXDES, 2016

Parameter identification for behavioral modeling of analog components including degradation.
Proceedings of the 2016 MIXDES, 2016

Stochastic LUT-based reliability-aware design method for operation point dependent CMOS circuits.
Proceedings of the 2016 MIXDES, 2016

Temperature- and aging-resistant inverter for robust and reliable time to digital circuit designs in a 65nm bulk CMOS process.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Online monitoring of NBTI and HCD in beta-multiplier circuits.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

2014
Analog behavioral modeling for age-dependent degradation of complex analog circuits.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014


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