Mainak Chaudhuri

According to our database, Mainak Chaudhuri authored at least 40 papers between 2002 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Zero Inclusion Victim: Isolating Core Caches from Inclusive Last-level Cache Evictions.

Mainak Chaudhuri

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

Zero Directory Eviction Victim: Unbounded Coherence Directory and Core Cache Isolation.

Mainak Chaudhuri

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020

Shared Pattern History Tables in Multicomponent Branch Predictors With a Dealiasing Cache.

Moumita Das, Ansuman Banerjee, Mainak Chaudhuri, Bhaskar Sardar

IEEE Embed. Syst. Lett., 2020

2019

Bandwidth-Aware Last-Level Caching: Efficiently Coordinating Off-Chip Read and Write Bandwidth.

Mainak Chaudhuri, Jayesh Gaur, Sreenivas Subramoney

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

2017

Using Criticality of GPU Accesses in Memory Management for CPU-GPU Heterogeneous Multi-Core Processors.

Siddharth Rai, Mainak Chaudhuri

ACM Trans. Embed. Comput. Syst., 2017

Micro-Sector Cache: Improving Space Utilization in Sectored DRAM Caches.

Mainak Chaudhuri, Mukesh Agrawal, Jayesh Gaur, Sreenivas Subramoney

ACM Trans. Archit. Code Optim., 2017

Improving CPU Performance Through Dynamic GPU Access Throttling in CPU-GPU Heterogeneous Processors.

Siddharth Rai, Mainak Chaudhuri

Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Sharing-Aware Efficient Private Caching in Many-Core Server Processors.

Sudhanshu Shukla, Mainak Chaudhuri

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Tiny Directory: Efficient Shared Memory in Many-Core Systems with Ultra-Low-Overhead Coherence Tracking.

Sudhanshu Shukla, Mainak Chaudhuri

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

Near-Optimal Access Partitioning for Memory Hierarchies with Multiple Heterogeneous Bandwidth Sources.

Jayesh Gaur, Mainak Chaudhuri, Pradeep Ramachandran, Sreenivas Subramoney

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016

Accelerating schedule space exploration of multi-threaded programs with GPUs.

Prakhar Banga, Atul Pai, Subhajit Roy, Mainak Chaudhuri

Proceedings of the 2016 ACM/IEEE International Conference on Formal Methods and Models for System Design, 2016

Divergence Aware Automated Partitioning of OpenCL Workloads.

Anirban Ghose, Soumyajit Dey, Pabitra Mitra, Mainak Chaudhuri

Proceedings of the 9th India Software Engineering Conference, 2016

Exploiting Dynamic Reuse Probability to Manage Shared Last-level Caches in CPU-GPU Heterogeneous Processors.

Siddharth Rai, Mainak Chaudhuri

Proceedings of the 2016 International Conference on Supercomputing, 2016

2015

Pool directory: Efficient coherence tracking with dynamic directory allocation in many-core systems.

Sudhanshu Shukla, Mainak Chaudhuri

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

2013

Efficient management of last-level caches in graphics processors for 3D scene rendering workloads.

Jayesh Gaur, Raghuram Srinivasan, Sreenivas Subramoney, Mainak Chaudhuri

Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

Characterizing multi-threaded applications for designing sharing-aware last-level cache replacement policies.

Ragavendra Natarajan, Mainak Chaudhuri

Proceedings of the IEEE International Symposium on Workload Characterization, 2013

2012

Performance Evaluation of Concurrent Lock-free Data Structures on GPUs.

Prabhakar Misra, Mainak Chaudhuri

Proceedings of the 18th IEEE International Conference on Parallel and Distributed Systems, 2012

Introducing hierarchy-awareness in replacement and bypass algorithms for last-level caches.

Mainak Chaudhuri, Jayesh Gaur, Nithiyanandan Bashyam, Sreenivas Subramoney, Joseph Nuzman

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011

Bypass and insertion algorithms for exclusive last-level caches.

Jayesh Gaur, Mainak Chaudhuri, Sreenivas Subramoney

Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

2010

Improving speculative loop parallelization via selective squash and speculation reuse.

Santhosh Sharma Ananthramu, Deepak Majeti, Sanjeev Kumar Aggarwal, Mainak Chaudhuri

Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009

Implementing a parallel matrix factorization library on the cell broadband engine.

B. C. Vishwas, Abhishek Gadia, Mainak Chaudhuri

Sci. Program., 2009

Pseudo-LIFO: the foundation of a new family of replacement policies for last-level caches.

Mainak Chaudhuri

Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches.

Mainak Chaudhuri

Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009

2007

Integrated Memory Controllers with Parallel Coherence Streams.

Mainak Chaudhuri, Mark A. Heinrich

IEEE Trans. Parallel Distributed Syst., 2007

Scavenger: A New Last Level Cache Architecture with Global Block Priority.

Arkaprava Basu, Nevin Kirman, Meyrem Kirman, Mainak Chaudhuri, José F. Martínez

Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007

Simplifying Active Memory Clusters by Leveraging Directory Protocol Threads.

Dhiraj D. Kalamkar, Mainak Chaudhuri, Mark A. Heinrich

Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007

Integrating Memory Compression and Decompression with Coherence Protocols in Distributed Shared Memory Multiprocessors.

Lakshmana Rao Vittanala, Mainak Chaudhuri

Proceedings of the 2007 International Conference on Parallel Processing (ICPP 2007), 2007

LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation.

Jugash Chandarlapati, Mainak Chaudhuri

Proceedings of the 25th International Conference on Computer Design, 2007

2006

Long-latency branches: how much do they matter?

Abhas Kumar, Nisheet Jain, Mainak Chaudhuri

SIGARCH Comput. Archit. News, 2006

2005

Checkpointed Early Load Retirement.

Nevin Kirman, Meyrem Kirman, Mainak Chaudhuri, José F. Martínez

Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005

2004

Exploring Virtual Network Selection Algorithms in DSM Cache Coherence Protocols.

Mainak Chaudhuri, Mark A. Heinrich

IEEE Trans. Parallel Distributed Syst., 2004

The Impact of Negative Acknowledgments in Shared Memory Scientific Applications.

Mainak Chaudhuri, Mark A. Heinrich

IEEE Trans. Parallel Distributed Syst., 2004

Architectural Support for Uniprocessor and Multiprocessor Active Memory Systems.

Daehyun Kim, Mainak Chaudhuri, Mark A. Heinrich, Evan Speight

IEEE Trans. Computers, 2004

SMTp: An Architecture for Next-generation Scalable Multi-threading.

Mainak Chaudhuri, Mark A. Heinrich

Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

2003

Latency, Occupancy, and Bandwidth in DSM Multiprocessors: A Performance Evaluation.

Mainak Chaudhuri, Mark A. Heinrich, Chris Holt, Jaswinder Pal Singh, Edward Rothberg, John L. Hennessy

IEEE Trans. Computers, 2003

Ocean warning: avoid drowning.

Mark A. Heinrich, Mainak Chaudhuri

SIGARCH Comput. Archit. News, 2003

Active Memory Techniques for ccNUMA Multiprocessors.

Daehyun Kim, Mainak Chaudhuri, Mark A. Heinrich

Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

2002

Cache Coherence Protocol Design for Active Memory Systems.

Mainak Chaudhuri, Daehyun Kim, Mark A. Heinrich

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

Active Memory Clusters: Efficient Multiprocessing on Commodity Clusters.

Mark A. Heinrich, Evan Speight, Mainak Chaudhuri

Proceedings of the High Performance Computing, 4th International Symposium, 2002

Leveraging cache coherence in active memory systems.

Daehyun Kim, Mainak Chaudhuri, Mark A. Heinrich

Proceedings of the 16th international conference on Supercomputing, 2002