John L. Hennessy

According to our database1, John L. Hennessy
  • authored at least 106 papers between 1980 and 2016.
  • has a "Dijkstra number"2 of three.

Awards

ACM Fellow

ACM Fellow 1997, "John L. Hennessy is a pioneer of RISC technology and a founder of MIPS Computer Systems. His work demonstrated to the field the symbiosis possible among compiler technology, instruction set architecture and processor design.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2016
Common Bonds: MIPS, HPS, Two-Level Branch Prediction, and Compressed Code RISC Processor.
IEEE Micro, 2016

2012
Computer Organization and Design - The Hardware / Software Interface (Revised 4th Edition).
The Morgan Kaufmann Series in Computer Architecture and Design, Academic Press, ISBN: 978-0-12-374750-1, 2012

Computer Architecture - A Quantitative Approach, 5th Edition.
Morgan Kaufmann, ISBN: 9789381269220, 2012

2007
Computer Architecture - A Quantitative Approach (4. ed.).
Morgan Kaufmann, ISBN: 978-0-12-370490-0, 2007

Computer organization and design - the hardware / software interface (3. ed.).
Morgan Kaufmann, ISBN: 978-0-12-370606-5, 2007

2005
Rechnerorganisation und -entwurf - die Hardware / Software-Schnittstelle (3. Aufl.).
Elsevier Spektrum Akadem. Verl., ISBN: 978-3-8274-1595-0, 2005

2003
Latency, Occupancy, and Bandwidth in DSM Multiprocessors: A Performance Evaluation.
IEEE Trans. Computers, 2003

Computer architecture - a quantitative approach, 3rd Edition.
Morgan Kaufmann, ISBN: 978-1-55860-596-1, 2003

2000
Efficient performance prediction for modern microprocessors.
Proceedings of the 2000 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, 2000

1999
A Quantitative Analysis of the Performance and Scalability of Distributed Shared Memory.
IEEE Trans. Computers, 1999

The Future of Systems Research.
IEEE Computer, 1999

1998
Flexible Use of Memory for Replication/Migration in Cache-Coherent DSM Multiprocessors.
Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998

The DASH Prototype: Implementation and Performance.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

The Stanford FLASH Multiprocessor.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

Retrospective: Evaluation of Directory Dchemes for Cache Coherence.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

An Evaluation of Directory Schemes for Cache Coherence.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

1997
A Nationwide Parallel Computing Environment.
Commun. ACM, 1997

An Evaluation of a Commercial CC-NUMA Architecture - The CONVEX Exemplar SPP1200.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

Computer Organization & Design: The Hardware/Software Interface, Second Edition
Morgan Kaufmann, ISBN: 1-55860-428-6, 1997

1996
The computer architecture curriculum at Stanford: challenges and approaches.
Proceedings of the 1996 workshop on Computer architecture education, 1996

Application and Architectural Bottlenecks in Large Scale Distributed Shared Memory Machines.
Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

SoftFLASH: Analyzing the Performance of Clustered Distributed Virtual Shared Memory.
Proceedings of the ASPLOS-VII Proceedings, 1996

Computer Architecture: A Quantitative Approach, 2nd Edition
Morgan Kaufmann, ISBN: 1-55860-329-8, 1996

1995
Implications of Hierarchical N-Body Methods for Multiprocessor Architectures
ACM Trans. Comput. Syst., 1995

Load Balancing and Data locality in Adaptive Hierarchical N-Body Methods: Barnes-Hut, Fast Multipole, and Rasiosity.
J. Parallel Distrib. Comput., 1995

Effectiveness of data dependence analysis.
International Journal of Parallel Programming, 1995

Position Paper.
Proceedings of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, 1995

1994
False Sharing ans Spatial Locality in Multiprocessor Caches.
IEEE Trans. Computers, 1994

SUIF: An Infrastructure for Research on Parallelizing and Optimizing Compilers.
SIGPLAN Notices, 1994

COOL: An Object-Based Language for Parallel Programming.
IEEE Computer, 1994

The Stanford FLASH Multiprocessor.
Proceedings of the 21st Annual International Symposium on Computer Architecture. Chicago, 1994

Evaluating the Memory Overhead Required for COMA Architectures.
Proceedings of the 21st Annual International Symposium on Computer Architecture. Chicago, 1994

The Performance Advantages of Integrating Block Data Trabsfer in Cache-Coherent Multiprocessors.
Proceedings of the ASPLOS-VI Proceedings, 1994

The Performance Impact of Flexibility in the Stanford FLASH Multiprocessor.
Proceedings of the ASPLOS-VI Proceedings, 1994

Computer Organization & Design: The Hardware/Software Interface
Morgan Kaufmann, ISBN: 1-55860-282-8, 1994

Rechnerarchitektur - Analyse, Entwurf, Implementierung, Bewertung.
Vieweg Lehrbuch Informatik, Vieweg, ISBN: 978-3-528-05173-0, 1994

1993
The DASH Prototype: Logic Overhead and Performance.
IEEE Trans. Parallel Distrib. Syst., 1993

Mtool: An Integrated System for Performance Debugging Shared Memory Multiprocessor Applications.
IEEE Trans. Parallel Distrib. Syst., 1993

Compile-time Copy Elimination.
Softw., Pract. Exper., 1993

Scaling Parallel Programs for Multiprocessors: Methodology and Examples.
IEEE Computer, 1993

The Accuracy of Trace-Driven Simulations of Multiprocessors.
Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1993

An empirical comparison of the Kendall Square Research KSR-1 and Stanford DASH multiprocessors.
Proceedings of the Proceedings Supercomputing '93, 1993

A parallel adaptive fast multipole method.
Proceedings of the Proceedings Supercomputing '93, 1993

Data Locality and Load Balancing in COOL.
Proceedings of the Fourth ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming (PPOPP), 1993

1992
Finding and Exploiting Parallelism in an Ocean Simulation Program: Experience, Results, and Implications.
J. Parallel Distrib. Comput., 1992

Programming for Different Memory Consistency Models.
J. Parallel Distrib. Comput., 1992

The Stanford Dash Multiprocessor.
IEEE Computer, 1992

Sharlit - A Tool for Building Optimizers.
Proceedings of the ACM SIGPLAN'92 Conference on Programming Language Design and Implementation (PLDI), 1992

The DASH Prototype: Implementation and Performance.
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992

Hiding Memory Latency using Dynamic Scheduling in Shared-Memory Multiprocessors.
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992

Characterizing the Caching and Synchronization Performance of a Multiprocessor Operating System.
Proceedings of the ASPLOS-V Proceedings, 1992

1991
Computer Technology and Architecture: An Evolving Interaction.
IEEE Computer, 1991

MTOOL: A Method for Detecting Memory Bottlenecks.
SIGMETRICS, 1991

Performance debugging shared memory multiprocessor programs with MTOOL.
Proceedings of the Proceedings Supercomputing '91, 1991

Efficient and Exact Data Dependence Analysis.
Proceedings of the ACM SIGPLAN'91 Conference on Programming Language Design and Implementation (PLDI), 1991

Integrating Scalar Optimization and Parallelization.
Proceedings of the Languages and Compilers for Parallel Computing, 1991

Comparative Evaluation of Latency Reducing and Tolerating Techniques.
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991

MTOOL: A Method for Isolating Memory Bottlenecks in Shared Memory Multiprocessor Programs.
Proceedings of the International Conference on Parallel Processing, 1991

Two Techniques to Enhance the Performance of Memory Consistency Models.
Proceedings of the International Conference on Parallel Processing, 1991

Multiprocessor Simulation and Tracing Using Tango.
Proceedings of the International Conference on Parallel Processing, 1991

Performance Evaluation of Memory Consistency Models for Shared Memory Multiprocessors.
Proceedings of the ASPLOS-IV Proceedings, 1991

1990
The Priority-Based Coloring Approach to Register Allocation.
ACM Trans. Program. Lang. Syst., 1990

A Spectral Lower Bound Techniqye for the Size of Decision Trees and Two Level AND/OR Circuits.
IEEE Trans. Computers, 1990

Analysis of Critical Architectural and Program Parameters in a Hierarchical Shared Memory Multiprocessor.
Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1990

The Directory-Based Cache Coherence Protocol for the DASH Multiprocessor.
Proceedings of the 17th Annual International Symposium on Computer Architecture. Seattle, 1990

Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors.
Proceedings of the 17th Annual International Symposium on Computer Architecture. Seattle, 1990

Share Data Placement Optimizations to Reduce Multiprocessor Cache Miss Rates.
Proceedings of the 1990 International Conference on Parallel Processing, 1990

Estimating the Performance Advantages of Relaxing Consistency in a Shared Memory Multiprocessor.
Proceedings of the 1990 International Conference on Parallel Processing, 1990

Design of scalable shared-memory multiprocessors: the DASH approach.
Proceedings of the Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, 1990

Computer Architecture: A Quantitative Approach.
Morgan Kaufmann, ISBN: 1-55860-188-0, 1990

1989
A Simple Interprocedural Register Allocation Algorithm and Its Effectiveness for Lisp.
ACM Trans. Program. Lang. Syst., 1989

An Analytical Cache Model.
ACM Trans. Comput. Syst., 1989

Copy Elimination in Functional Languages.
Proceedings of the Conference Record of the Sixteenth Annual ACM Symposium on Principles of Programming Languages, 1989

Characteristics of Performance-Optimal Multi-Level Cache Hierarchies.
Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989

1988
Measurement and Evaluation of the MIPS Architecture and Processor.
ACM Trans. Comput. Syst., 1988

Cache Performance of Operating System and Multiprogramming Workloads.
ACM Trans. Comput. Syst., 1988

Lisp on a Reduced-Instruction-Set Processor: Characterization and Optimization.
IEEE Computer, 1988

Characterizing the Synchronization Behavior of Parallel Programs.
Proceedings of the ACM/SIGPLAN PPEALS 1988, 1988

A Simple and Efficient Implmentation Approach for Single Assignment Languages.
LISP and Functional Programming, 1988

Performance Tradeoffs in Cache Design.
Proceedings of the 15th Annual International Symposium on Computer Architecture. Honolulu, 1988

An Evaluation of Directory Schemes for Cache Coherence.
Proceedings of the 15th Annual International Symposium on Computer Architecture. Honolulu, 1988

1987
Tags and Type Checking in Lisp: Hardware and Software Approaches.
Proceedings of the Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS II), 1987

1986
Compile-time partitioning and scheduling of parallel programs.
Proceedings of the 1986 SIGPLAN Symposium on Compiler Construction, 1986

LISP on a Reduced-Instruction-Set-Processor.
LISP and Functional Programming, 1986

Partitioning Parallel Programs for Macro-Dataflow.
LISP and Functional Programming, 1986

Reducing the Cost of Branches.
Proceedings of the 13th Annual Symposium on Computer Architecture, Tokyo, Japan, June 1986, 1986

1985
SWAMI: a flexible logic implementation system.
Proceedings of the 22nd ACM/IEEE conference on Design automation, 1985

1984
VLSI Processor Architecture.
IEEE Trans. Computers, 1984

Register allocation by priority-based coloring.
Proceedings of the 1984 SIGPLAN Symposium on Compiler Construction, 1984

Register allocation by priority-based coloring (with retrospective)
Proceedings of the 20 Years of the ACM SIGPLAN Conference on Programming Language Design and Implementation 1979-1999, 1984

1983
Postpass Code Optimization of Pipeline Constraints.
ACM Trans. Program. Lang. Syst., 1983

1982
Symbolic Debugging of Optimized Code.
ACM Trans. Program. Lang. Syst., 1982

Compilation of the Pascal Case Statement.
Softw., Pract. Exper., 1982

The Design and Implementation of Parametric Types in Pascal.
Softw., Pract. Exper., 1982

Retargetable Compiler Code Generation.
ACM Comput. Surv., 1982

Code Generation and Reorganization in the Presence of Pipeline Constraints.
Proceedings of the Conference Record of the Ninth Annual ACM Symposium on Principles of Programming Languages, 1982

MIPS: A microprocessor architecture.
Proceedings of the 15th annual workshop on Microprogramming, 1982

Optimizing delayed branches.
Proceedings of the 15th annual workshop on Microprogramming, 1982


Hardware/Software Tradeoffs for Increased Performance.
Proceedings of the Symposium on Architectural Support for Programming Languages and Operating Systems, 1982

1981
The Formal Definition of a Real-Time Language.
Acta Inf., 1981

WSClock - A Simple and Effective Algorithm for Virtual Memory Management.
Proceedings of the Eighth Symposium on Operating System Principles, 1981

Program Optimization and Exception Handling.
Proceedings of the Conference Record of the Eighth Annual ACM Symposium on Principles of Programming Languages, 1981

1980
Parallelism and Representation Problems in Distributed Systems.
IEEE Trans. Computers, 1980

An Interactive Graphics System for custom design.
Proceedings of the 17th Design Automation Conference, 1980


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