Makoto Noda

According to our database1, Makoto Noda authored at least 5 papers between 1991 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2013
Full Four-Channel 6.3-Gb/s 60-GHz CMOS Transceiver With Low-Power Analog and Digital Baseband Circuitry.
IEEE J. Solid State Circuits, 2013

2012
A full 4-channel 6.3Gb/s 60GHz direct-conversion transceiver with low-power analog and digital baseband circuitry.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
A 60-GHz 16QAM/8PSK/QPSK/BPSK Direct-Conversion Transceiver for IEEE802.15.3c.
IEEE J. Solid State Circuits, 2011

2010
A new parallel algorithm for full-digital phase-locked loop for high-throughput carrier and timing recovery systems.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

1991
A One-Chip Scalable 8 * 8 ATM Switch LSI Employing Shared Buffer Architecture.
IEEE J. Sel. Areas Commun., 1991


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