Ahmed Musa
Orcid: 0000-0001-6364-1719
According to our database1,
Ahmed Musa
authored at least 61 papers
between 2005 and 2023.
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Bibliography
2023
Clust. Comput., December, 2023
IEEE Syst. J., September, 2023
J. Frankl. Inst., July, 2023
Joint opportunistic MIMO-mode selection and channel-user assignment for improved throughput in beyond 5G networks.
Ad Hoc Networks, May, 2023
A Jamming-resilient opportunistic QoS-constrained multi-channel routing for green IoT networking.
Wirel. Networks, 2023
Routing in FD-Enabled Cognitive Radio Networks with Minimum Time-Sharing for Improved Performance.
Proceedings of the Tenth International Conference on Software Defined Systems, 2023
Exploiting MIMO and Cognitive Radio for Improved Performance in Indoor Communication Systems.
Proceedings of the International Conference on Multimedia Computing, 2023
2022
IEEE Internet Things J., 2022
2021
Effective peer-to-peer routing in heterogeneous half-duplex and full-duplex multi-hop cognitive radio networks.
Peer-to-Peer Netw. Appl., 2021
Proceedings of the Eighth International Conference on Social Network Analysis, 2021
2020
Spectrum management with simultaneous power-controlled assignment decisions in cognitive radio networks.
Concurr. Comput. Pract. Exp., 2020
2019
J. Ambient Intell. Humaniz. Comput., 2019
Int. J. Commun. Syst., 2019
A rate-maximizing spectrum sharing algorithm for cognitive radio networks with generic resource constraints.
Trans. Emerg. Telecommun. Technol., 2019
Batch-based Power-controlled Channel Assignment for Improved Throughput in Software-defined Networks.
Proceedings of the 16th International Multi-Conference on Systems, Signals & Devices, 2019
2018
A Survey on Hybrid Beamforming Techniques in 5G: Architecture and System Model Perspectives.
IEEE Commun. Surv. Tutorials, 2018
A resource sharing platform for resource-constrained software defined cognitive radio networks.
Proceedings of the Fifth International Conference on Software Defined Systems, 2018
2017
IEEE J. Solid State Circuits, 2017
Opportunistic Relaying Protocol for Device-to-Device Communication with Cognitive Radio Capability.
Proceedings of the 5th International Conference on Future Internet of Things and Cloud Workshops, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
An Efficient Bit-Level Lossless Grayscale Image Compression Based on Adaptive Source Mapping.
J. Inf. Process. Syst., 2016
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2015
An 8-mode reconfigurable sensor-independent readout circuit for trillion sensors era.
Proceedings of the Tenth IEEE International Conference on Intelligent Sensors, 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
A Wide Frequency PLL-less Clock Generator with Fast Intermittent Operation for Low-Power Wearable Medical Applications.
Proceedings of the 21st Asia-Pacific Conference on Communications, 2015
2014
A Compact, Low-Power and Low-Jitter Dual-Loop Injection Locked PLL Using All-Digital PVT Calibration.
IEEE J. Solid State Circuits, 2014
A Compact and Low-Power Fractionally Injection-Locked Quadrature Frequency Synthesizer Using a Self-Synchronized Gating Injection Technique for Software-Defined Radios.
IEEE J. Solid State Circuits, 2014
Embedded devices for supply chain applications: Towards hardware integration of disparate technologies.
Expert Syst. Appl., 2014
Expert Syst. Appl., 2014
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
A dual-loop injection-locked PLL with all-digital background calibration system for on-chip clock generation.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
Full Four-Channel 6.3-Gb/s 60-GHz CMOS Transceiver With Low-Power Analog and Digital Baseband Circuitry.
IEEE J. Solid State Circuits, 2013
A Sub-Harmonic Injection-Locked Quadrature Frequency Synthesizer With Frequency Calibration Scheme for Millimeter-Wave TDD Transceivers.
IEEE J. Solid State Circuits, 2013
A 20 GHz Push-Push Voltage-Controlled Oscillator Using Second-Harmonic Peaking Technique for a 60 GHz Frequency Synthesizer.
IEICE Trans. Electron., 2013
IEICE Trans. Electron., 2013
A 0.022mm<sup>2</sup> 970µW dual-loop injection-locked PLL with -243dB FOM using synthesizable all-digital PVT calibration circuits.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
A 13.2% locking-range divide-by-6, 3.1mW, ILFD using even-harmonic-enhanced direct injection technique for millimeter-wave PLLs.
Proceedings of the ESSCIRC 2013, 2013
A sub-harmonic injection-locked frequency synthesizer with frequency calibration scheme for use in 60GHz TDD transceivers.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
A fractional-N harmonic injection-locked frequency synthesizer with 10MHz-6.6GHz quadrature outputs for software-defined radios.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
Int. J. Web Based Communities, 2012
A full 4-channel 6.3Gb/s 60GHz direct-conversion transceiver with low-power analog and digital baseband circuitry.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 9th International Conference on Fuzzy Systems and Knowledge Discovery, 2012
Proceedings of the Decision Support Systems II - Recent Developments Applied to DSS Network Environments, 2012
A 58.1-to-65.0GHz frequency synthesizer with background calibration for millimeter-wave TDD transceivers.
Proceedings of the 38th European Solid-State Circuit conference, 2012
MEWARE: Enhanced workflow automation, reliability and efficiency in medical establishments.
Proceedings of the 2012 Colloquium in Information Science and Technology, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
J. Ubiquitous Syst. Pervasive Networks, 2011
IEEE J. Solid State Circuits, 2011
A Low Phase Noise Quadrature Injection Locked Frequency Synthesizer for MM-Wave Applications.
IEEE J. Solid State Circuits, 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
A 20GHz ILFD with locking range of 31% for divide-by-4 and 15% for divide-by-8 using progressive mixing.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011
A 60GHz 16Gb/s 16QAM low-power direct-conversion transceiver using capacitive cross-coupling neutralization in 65 nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2010
An efficient compression technique using Lempel-Ziv algorithm based on dynamic source encoding scheme.
Int. J. Inf. Commun. Technol., 2010
Arabic Handwriting Descriptor Using Gaussian Steerable Filters.
Proceedings of the 2010 International Conference on Artificial Intelligence, 2010
2009
Arabic Text Compression Technique Based on Lempel-Ziv Algorithm.
Proceedings of the 2009 International Conference on Information & Knowledge Engineering, 2009
2008
A Modified Text Compression Technique Based on Lempel-Ziv Algorithm.
Proceedings of the 2008 International Conference on Information & Knowledge Engineering, 2008
2005
Circuit Establishment in a Hybrid Optical-CDMA and WDM All-optical Network Using the Flodding Mechanism.
Proceedings of the 2005 International Conference on Communications in Computing, 2005