Mao-Hsu Yen

Orcid: 0000-0001-9195-4173

According to our database1, Mao-Hsu Yen authored at least 29 papers between 2001 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Adaptive Indoor People-Counting System Based on Edge AI Computing.
IEEE Trans. Emerg. Top. Comput. Intell., February, 2024

2023
A Partial-Givens-Rotation-Based Symbol Detector for GSM MIMO Systems: Algorithm and VLSI Implementation.
IEEE Syst. J., December, 2023

Algorithm and VLSI Architecture of a Near-Optimum Symbol Detector for QSM MIMO Systems.
IEEE Access, 2023

VLSI Implementation of RISC-V MCU with a variable stage pipeline.
Proceedings of the 6th IEEE International Conference on Knowledge Innovation and Invention, 2023

FPGA Design of RISC-V MCU Collaborative Industrial Printer Control System.
Proceedings of the 6th IEEE International Conference on Knowledge Innovation and Invention, 2023

2022
Design of a Multi-Sensor System for Exploring the Relation between Finger Spasticity and Voluntary Movement in Patients with Stroke.
Sensors, 2022

Efficient Hardware Implementation of CORDIC-Based Symbol Detector for GSM MIMO Systems: Algorithm and Hardware Architecture.
IEEE Access, 2022

VLSI Implementation of RISC MCU with In-Circuit Debugger.
Proceedings of the 5th IEEE International Conference on Knowledge Innovation and Invention, 2022

FPGA Implementation of ARM MCU with Five-stage Pipeline.
Proceedings of the 5th IEEE International Conference on Knowledge Innovation and Invention, 2022

2018
Fast Symbol Detection for Massive G-STBC MIMO Systems.
Wirel. Pers. Commun., 2018

Fast group detection for massive MIMOs.
IET Commun., 2018

2016
Semantic-based graph data anonymization for big data analysis.
Proceedings of the International Conference on Machine Learning and Cybernetics, 2016

2015
Area-Efficient 128- to 2048/1536-Point Pipeline FFT Processor for LTE and Mobile WiMAX Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Comment on "On Optimal Hyperuniversal and Rearrangeable Switch Box Designs".
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

2014
VLSI Implementation of 8051 MCU with In-System Programming.
Proceedings of the Intelligent Systems and Applications, 2014

Using Wi-Fi Direct to Assist Real-Time Traffic Conditions Delivery.
Proceedings of the Intelligent Systems and Applications, 2014

Access popularity based wireless broadcasting mechanism.
Proceedings of the 2014 International Conference on Machine Learning and Cybernetics, 2014

2013
A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design.
VLSI Design, 2013

Hyper-Universal Switch Network for FPIC Design.
Proceedings of the Seventh International Conference on Complex, 2013

2012
Fast data access and energy-efficient protocol for wireless data broadcast.
Wirel. Commun. Mob. Comput., 2012

Design and implementation of a low-power OFDM receiver for wireless communications.
IEEE Trans. Consumer Electron., 2012

Design of a low-power OFDM baseband receiver for wireless communications.
Proceedings of the IEEE International Conference on Consumer Electronics, 2012

2011
A low-power 64-point pipeline FFT/IFFT processor for OFDM applications.
IEEE Trans. Consumer Electron., 2011

2010
ARAL-CR: An adaptive reasoning and learning cognitive radio platform.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

An adaptive PID controller.
Proceedings of the International Conference on Machine Learning and Cybernetics, 2010

2009
Parallel implementation of convolution encoder for software defined radio on DSP architecture.
Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009

A 900 MHz to 5.2 GHz Dual-loop Feedback Multi-band LNA.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2001
Symmetric and Programmable Multi-Chip Module for Low-Power Prototyping System.
VLSI Design, 2001

A Three-Stage One-Sided Rearrangeable Polygonal Switching Network.
IEEE Trans. Computers, 2001


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