Sakir Sezer

According to our database1, Sakir Sezer authored at least 155 papers between 1998 and 2019.

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Bibliography

2019
A Multimodal Deep Learning Method for Android Malware Detection Using Various Features.
IEEE Trans. Information Forensics and Security, 2019

2018
Evolution of ransomware.
IET Networks, 2018

Demonstrating Cyber-Physical Attacks and Defense for Synchrophasor Technology in Smart Grid.
Proceedings of the 16th Annual Conference on Privacy, Security and Trust, 2018

Peer Based Tracking using Multi-Tuple Indexing for Network Traffic Analysis and Malware Detection.
Proceedings of the 16th Annual Conference on Privacy, Security and Trust, 2018

Detecting Cryptomining Using Dynamic Analysis.
Proceedings of the 16th Annual Conference on Privacy, Security and Trust, 2018

Using Application Layer Metrics to Detect Advanced SCADA Attacks.
Proceedings of the 4th International Conference on Information Systems Security and Privacy, 2018

2017
GPS-Disciplined Analog-to-Digital Converter for Phasor Measurement Applications.
IEEE Trans. Instrumentation and Measurement, 2017

STPA-SafeSec: Safety and security analysis for cyber-physical systems.
J. Inf. Sec. Appl., 2017

Continuous Implicit Authentication for Mobile Devices based on Adaptive Neuro-Fuzzy Inference System.
CoRR, 2017

Improving Dynamic Analysis of Android Apps Using Hybrid Test Input Generation.
CoRR, 2017

EMULATOR vs REAL PHONE: Android Malware Detection Using Machine Learning.
CoRR, 2017

Design and Implementation of Security Gateway for Synchrophasor Based Real-Time Control and Monitoring in Smart Grid.
IEEE Access, 2017

The Effects of Traditional Anti-Virus Labels on Malware Detection Using Dynamic Runtime Opcodes.
IEEE Access, 2017

STRIDE-based threat modeling for cyber-physical systems.
Proceedings of the 2017 IEEE PES Innovative Smart Grid Technologies Conference Europe, 2017

New sensing technique for detecting application layer DDoS attacks targeting back-end database resources.
Proceedings of the IEEE International Conference on Communications, 2017

HTTP/2 Tsunami: Investigating HTTP/2 proxy amplification DDoS attacks.
Proceedings of the Seventh International Conference on Emerging Security Technologies, 2017

HTTP/2 Cannon: Experimental analysis on HTTP/1 and HTTP/2 request flood DDoS attacks.
Proceedings of the Seventh International Conference on Emerging Security Technologies, 2017

Continuous implicit authentication for mobile devices based on adaptive neuro-fuzzy inference system.
Proceedings of the 2017 International Conference on Cyber Security And Protection Of Digital Services, 2017

Improving dynamic analysis of android apps using hybrid test input generation.
Proceedings of the 2017 International Conference on Cyber Security And Protection Of Digital Services, 2017

Weighted grid authorization graph (WGAG).
Proceedings of the Sixth International Conference on Communications and Networking, 2017

Deep Android Malware Detection.
Proceedings of the Seventh ACM on Conference on Data and Application Security and Privacy, 2017

EMULATOR vs REAL PHONE: Android Malware Detection Using Machine Learning.
Proceedings of the 3rd ACM on International Workshop on Security And Privacy Analytics, 2017

2016
Spatio-Temporal Rich Model-Based Video Steganalysis on Cross Sections of Motion Vector Planes.
IEEE Trans. Image Processing, 2016

Detecting obfuscated malware using reduced opcode set and optimised runtime trace.
Security Informatics, 2016

A New Android Malware Detection Approach Using Bayesian Classification.
CoRR, 2016

Analysis of Bayesian Classification based Approaches for Android Malware Detection.
CoRR, 2016

High Accuracy Android Malware Detection Using Ensemble Learning.
CoRR, 2016

Android Malware Detection Using Parallel Machine Learning Classifiers.
CoRR, 2016

Android Malware Detection: an Eigenspace Analysis Approach.
CoRR, 2016

Fuzzy Logic-based Implicit Authentication for Mobile Access Control.
CoRR, 2016

Event-Driven Implicit Authentication for Mobile Access Control.
CoRR, 2016

N-gram Opcode Analysis for Android Malware Detection.
CoRR, 2016

PageRank in Malware Categorization.
CoRR, 2016

N-opcode Analysis for Android Malware Classification and Categorization.
CoRR, 2016

DynaLog: An automated dynamic analysis framework for characterizing Android applications.
CoRR, 2016

A Survey of Security in Software Defined Networks.
IEEE Communications Surveys and Tutorials, 2016

Feature study on a programmable network traffic classifier.
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

OSCIDS: An Ontology based SCADA Intrusion Detection Framework.
Proceedings of the 13th International Joint Conference on e-Business and Telecommunications (ICETE 2016), 2016

Threat Analysis of BlackEnergy Malware for Synchrophasor based Real-time Control and Monitoring in Smart Grid.
Proceedings of the 4th International Symposium for ICS & SCADA Cyber Security Research 2016, 2016

Towards A Stateful Analysis Framework for Smart Grid Network Intrusion Detection.
Proceedings of the 4th International Symposium for ICS & SCADA Cyber Security Research 2016, 2016

Modelling Duqu 2.0 Malware using Attack Trees with Sequential Conjunction.
Proceedings of the 2nd International Conference on Information Systems Security and Privacy, 2016

IEEE C37.118-2 Synchrophasor Communication Framework - Overview, Cyber Vulnerabilities Analysis and Performance Evaluation.
Proceedings of the 2nd International Conference on Information Systems Security and Privacy, 2016

Contextual Intrusion Alerts for Scada Networks - An Ontology based Approach for Intrusion Alerts Post Processing.
Proceedings of the 2nd International Conference on Information Systems Security and Privacy, 2016

N-opcode analysis for android malware classification and categorization.
Proceedings of the 2016 International Conference On Cyber Security And Protection Of Digital Services (Cyber Security), 2016

2015
High accuracy android malware detection using ensemble learning.
IET Information Security, 2015

Software as a Service: Analyzing Security Issues.
CoRR, 2015

Per-flow state management technique for high-speed networks.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

Memory cost analysis for OpenFlow multiple table lookup.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

PageRank in malware categorization.
Proceedings of the 2015 Conference on research in adaptive and convergent systems, 2015

Event-Driven Implicit Authentication for Mobile Access Control.
Proceedings of the 9th International Conference on Next Generation Mobile Applications, 2015

Spatio-temporal rich model for motion vector steganalysis.
Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

Investigating cyber-physical attacks against IEC 61850 photovoltaic inverter installations.
Proceedings of the 20th IEEE Conference on Emerging Technologies & Factory Automation, 2015

2014
Analysis of Bayesian classification-based approaches for Android malware detection.
IET Information Security, 2014

Malware detection: program run length against detection rate.
IET Software, 2014

A hardware acceleration scheme for memory-efficient flow processing.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

A configurable packet classification architecture for Software-Defined Networking.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

Android Malware Detection Using Parallel Machine Learning Classifiers.
Proceedings of the Eighth International Conference on Next Generation Mobile Apps, 2014

PRECYSE: Cyber-attack Detection and Response for Industrial Control Systems.
Proceedings of the 2nd International Symposium for ICS & SCADA Cyber Security Research 2014, 2014

OperationCheckpoint: SDN Application Control.
Proceedings of the 22nd IEEE International Conference on Network Protocols, 2014

Secure virtualised environment.
Proceedings of the 9th International Conference for Internet Technology and Secured Transactions, 2014

Optimized packet classification for Software-Defined Networking.
Proceedings of the IEEE International Conference on Communications, 2014

An improvement of IP address lookup based on rule filter analysis.
Proceedings of the IEEE International Conference on Communications, 2014

Detecting packed executables using steganalysis.
Proceedings of the 5th European Workshop on Visual Information Processing, 2014

Network Based Malware Detection within Virtualised Environments.
Proceedings of the Euro-Par 2014: Parallel Processing Workshops, 2014

2013
SVM Training Phase Reduction Using Dataset Feature Filtering for Malware Detection.
IEEE Trans. Information Forensics and Security, 2013

Are we ready for SDN? Implementation challenges for software-defined networks.
IEEE Communications Magazine, 2013

Sdn Security: A Survey.
Proceedings of the IEEE SDN for Future Networks and Services, 2013

NFP-6xxx - a 22nm high-performance network flow processor for 200Gb/s Software Defined Networking.
Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

Video steganalysis of LSB based motion vector steganography.
Proceedings of the European Workshop on Visual Information Processing, 2013

A New Android Malware Detection Approach Using Bayesian Classification.
Proceedings of the 27th IEEE International Conference on Advanced Information Networking and Applications, 2013

2012
Fully hardware based WFQ architecture for high-speed QoS packet scheduling.
Integration, 2012

Implementation of a network flow lookup circuit for next-generation packet classifiers.
Proceedings of the IEEE 25th International SOC Conference, 2012

A 1Gbps FPGA-based wireless baseband MIMO transceiver.
Proceedings of the IEEE 25th International SOC Conference, 2012

Design of interlock-free combined allocators for Networks-on-Chip.
Proceedings of the IEEE 25th International SOC Conference, 2012

Custom purpose regular expression processor architecture for network processing.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

ITACA: Flexible, scalable network analysis.
Proceedings of IEEE International Conference on Communications, 2012

2011
Host-Based P2P Flow Identification and Use in Real-Time.
TWEB, 2011

Classifying network protocols: A 'two-way' flow approach.
IET Communications, 2011

Obfuscation: The Hidden Malware.
IEEE Security & Privacy, 2011

Low power Gm-boosted differential Colpitts VCO.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

Exploring Virtual-Channel architecture in FPGA based Networks-on-Chip.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

High performance multi-engine regular expression processing.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

The Impact of Global Routing on the Performance of NoCs in FPGAs.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Impact of cyber-security issues on Smart Grid.
Proceedings of the 2nd IEEE PES International Conference and Exhibition on "Innovative Smart Grid Technologies", 2011

An Approach for Unifying Rule Based Deep Packet Inspection.
Proceedings of IEEE International Conference on Communications, 2011

Generic Low-Latency NoC Router Architecture for FPGA Computing Systems.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010
Guest Editorial Special Section on 2009 IEEE System-on-Chip Conference.
IEEE Trans. on Circuits and Systems, 2010

Analysis of information leakage from encrypted Skype conversations.
Int. J. Inf. Sec., 2010

Reconfigurable system-on-a-chip motion estimation architecture for multi-standard video coding.
IET Computers & Digital Techniques, 2010

High-Performance random data lookup for network processing.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Design and analysis of an advanced static blocked multithreading architecture.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

ARAL-CR: An adaptive reasoning and learning cognitive radio platform.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

TLM2.0 based timing accurate modeling method for complex NoC systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

On the Privacy of Encrypted Skype Communications.
Proceedings of the Global Communications Conference, 2010

Advanced Multithreading Architecture with Hardware Based Scheduling.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Utilising Mobile Wireless Network Technologies to Support an Intelligent Sensor Information System for Public Transport Safety.
Proceedings of the 2010 International Conference on Emerging Security Technologies, 2010

Intelligent Sensor Information System For Public Transport - To Safely Go...
Proceedings of the Seventh IEEE International Conference on Advanced Video and Signal Based Surveillance, 2010

2009
Design and Implementation of a Field Programmable CRC Circuit Architecture.
IEEE Trans. VLSI Syst., 2009

Subpixel Interpolation Architecture for Multistandard Video Motion Estimation.
IEEE Trans. Circuits Syst. Video Techn., 2009

DDR3 based lookup circuit for high-performance network processing.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

NFA decomposition and multiprocessing architecture for parallel regular expression processing.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Classification of P2P and HTTP Using Specific Protocol Characteristics.
Proceedings of the Internet of the Future, 2009

Identification of P2P flows through host activity.
Proceedings of the 6th International ICST Conference on Broadband Communications, 2009

2008
A Scalable Packet Sorting Circuit for High-Speed WFQ Packet Scheduling.
IEEE Trans. VLSI Syst., 2008

Packet Classification by Multilevel Cutting of the Classification Space: An Algorithmic-Architectural Solution for IP Packet Classification in Next Generation Networks.
Journal Comp. Netw. and Communic., 2008

High performance IP lookup circuit using DDR SDRAM.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Multi-standard sub-pixel interpolation architecture for video Motion Estimation.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Application development flow for on-chip distributed architectures.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

2007
A versatile content addressable memory architecture.
Proceedings of the 2007 IEEE International SOC Conference, 2007

Programmable CRC circuit architecture.
Proceedings of the 2007 IEEE International SOC Conference, 2007

Accelerating pattern matching for DPI.
Proceedings of the 2007 IEEE International SOC Conference, 2007

Reconfigurable video motion estimation processor.
Proceedings of the 2007 IEEE International SOC Conference, 2007

An FPGA Based Memory Efficient Shared Buffer Implementation.
Proceedings of the FPL 2007, 2007

Reconfigurable Motion Estimation Architecture for Multi-standard Video Compression.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

Novel Content Addressable Memory Architecture for Adaptive Systems.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

An RLDRAM II Implementation of a 10Gbps Shared Packet Buffer for Network Processing.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

High-Speed IP Address Lookups Using Hardware Based Tree Structures.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

Systolic Array Based Architecture for Variable Block-Size Motion Estimation.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

FPGA-Based Lookup Circuit for Session-Based IP Packet Classification.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007

2006
A Scalable Packet Sorting Circuit for High-Speed WFQ Packet Scheduling.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

Delay-bound preservation through packet scheduling at wireless access point nodes.
Proceedings of the 3rd international conference on Mobile technology, 2006

A VLSI GFP Frame Delineation Circuit.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

High performance service-time-stamp computation for WFQ IP packet scheduling.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Investigation into programmability for layer 2 protocol frame delineation architectures.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Design and analysis of matching circuit architectures for a closest match lookup.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

A Study of Shared Buffer Memory Segmentation for Packet Switched Networks.
Proceedings of the Advanced International Conference on Telecommunications and International Conference on Internet and Web Applications and Services (AICT/ICIW 2006), 2006

Exploring CAM Design For Network Processing Using FPGA Technology.
Proceedings of the Advanced International Conference on Telecommunications and International Conference on Internet and Web Applications and Services (AICT/ICIW 2006), 2006

Design and Analysis of Matching Circuit Architectures for a Closest Match Lookup.
Proceedings of the Advanced International Conference on Telecommunications and International Conference on Internet and Web Applications and Services (AICT/ICIW 2006), 2006

2005
Design and implementation of a shared buffer architecture for a gigabit Ethernet packet switch.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Assessing the Impact of Rainfall on System Bandwidth for Broadband Fixed Wireless Applications.
Proceedings of the Telecommunications 2005: Advanced Industrial Conference on Telecommunications / Service Assurance with Partial and Intermittent Resources Conference / E-Learning on Telecommunications Workshop (AICT / SAPIR / ELETE 2005), 2005

A 10 Gbps GFP Frame Delineation Circuit with Single Bit Error Correction on an FPGA.
Proceedings of the Telecommunications 2005: Advanced Industrial Conference on Telecommunications / Service Assurance with Partial and Intermittent Resources Conference / E-Learning on Telecommunications Workshop (AICT / SAPIR / ELETE 2005), 2005

The Design and Implementation of a Shared Packet Buffer Architecture for Fixed and Variable Sized Packets.
Proceedings of the Telecommunications 2005: Advanced Industrial Conference on Telecommunications / Service Assurance with Partial and Intermittent Resources Conference / E-Learning on Telecommunications Workshop (AICT / SAPIR / ELETE 2005), 2005

Reconfigurable Instruction Interface Architecture for Private-Key Cryptography on the Altera Nios-II Processor.
Proceedings of the Telecommunications 2005: Advanced Industrial Conference on Telecommunications / Service Assurance with Partial and Intermittent Resources Conference / E-Learning on Telecommunications Workshop (AICT / SAPIR / ELETE 2005), 2005

Implementing High Speed IP Address Lookups in Hardware.
Proceedings of the Telecommunications 2005: Advanced Industrial Conference on Telecommunications / Service Assurance with Partial and Intermittent Resources Conference / E-Learning on Telecommunications Workshop (AICT / SAPIR / ELETE 2005), 2005

Packet Classification Using Adaptive Rules Cutting (ARC).
Proceedings of the Telecommunications 2005: Advanced Industrial Conference on Telecommunications / Service Assurance with Partial and Intermittent Resources Conference / E-Learning on Telecommunications Workshop (AICT / SAPIR / ELETE 2005), 2005

2004
Exploration of GFP frame delineation architectures for network processing.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

A weighted fair queuing finishing tag computation architecture and implementation.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

A Reconfigurable Tag Computation Architecture for Terabit Packet Scheduling.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

The Implementation of Scalable ATM Frame Delineation Circuits.
Proceedings of the Telecommunications and Networking, 2004

Adaptive Echo Cancellation for Packet-Based Networks.
Proceedings of the Telecommunications and Networking, 2004

Implementation of a Novel Credit Based SCFQ Scheduler for Broadband Wireless Access.
Proceedings of the Telecommunications and Networking, 2004

Web Based Service Provision - A Case Study: Electronic Design Automation.
Proceedings of the Telecommunications and Networking, 2004

Architecture and implementation of a novel tag computation circuit for broadband wireless access packet scheduling.
Proceedings of IEEE International Conference on Communications, 2004

An investigation into the design of high-performance shared buffer architectures based on FPGA technology with embedded memory.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

2003
A 32-Bit SoPC Implementation of a P5.
Proceedings of the Eighth IEEE Symposium on Computers and Communications (ISCC 2003), 30 June, 2003

A Programmable and Highly Pipelined PPP Architecture for Gigabit IP over SDH/SONET.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

A Framework for Remote EDA Tooling and Distributed Resource Management.
Proceedings of the International Conference on Internet Computing, 2003

Custom Tag Computation Circuit for a 10Gbps SCFQ Scheduler.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

A Pipelined SoPC Architecture for 2.5 Gbps Network Processing.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

2001
Development of a Run-Time Reconfiguration System with Low Reconfiguration Overhead.
VLSI Signal Processing, 2001

System on a FPGA Virtual Concatenation.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

2000
Performance Analysis of Access Points In Cellular Wireless ATM Networks.
Proceedings of the Managing QoS in Multimedia Networks and Services, IEEE/IFIP TC6, 2000

1999
The Influence of Cumulative Switch Delay in Multiple Service Class Networks.
IMSA, 1999

A Virtual Hardware Handler for RTR Systems.
Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

1998
Fast Partial Reconfiguration for FCCMs.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998


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