Marc Margalef-Rovira

According to our database, Marc Margalef-Rovira authored at least 7 papers between 2017 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Special Session on RF/5G Test.

William R. Eisenstadt, Mark Roos, Devin Morris, José Luis González-Jiménez, Christopery Mounet, Manuel J. Barragán, Gildas Léger, Florent Cilici, Estelle Lauga-Larroze, Salvador Mir, Sylvain Bourdel, Marc Margalef-Rovira, Issa Alaji, Haitham Ghanem, Guillaume Ducournau, Christophe Gaquière

Proceedings of the IEEE European Test Symposium, 2022

2021

mm-Wave Through-Load Element for On-Wafer Measurement Applications.

Marc Margalef-Rovira, Olivier Occello, Abdelhalim A. Saadi, Vanessa Avramovic, Sylvie Lépilliet, Loic Vincent, Manuel J. Barragán, Emmanuel Pistono, Sylvain Bourdel, Christophe Gaquière, Philippe Ferrari

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

mm-Wave Single-Pole Double-Throw switches: HBT- vs MOSFET-based designs.

Marc Margalef-Rovira, Christophe Gaquière, Antonio Augusto Lisboa de Souza, Loic Vincent, Manuel J. Barragán, Emmanuel Pistono, Florence Podevin, Philippe Ferrari

Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021

2020

Design of a 77-GHz LC-VCO With a Slow-Wave Coplanar Stripline-Based Inductor.

Ekta Sharma, Abdelhalim A. Saadi, Marc Margalef-Rovira, Emmanuel Pistono, Manuel J. Barragán, Antonio Augusto Lisboa de Souza, Philippe Ferrari, Sylvain Bourdel

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

mm-Wave Through-Load Switch for in-situ Vector Network Analyzer on a 55-nm BiCMOS Technology.

Marc Margalef-Rovira, Abdelhalim A. Saadi, Sylvain Bourdel, Manuel J. Barragán, Emmanuel Pistono, Christophe Gaquière, Philippe Ferrari

Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

2018

An oscillation-based test technique for on-chip testing of mm-wave phase shifters.

Marc Margalef-Rovira, Manuel J. Barragán, Ekta Sharma, Philippe Ferrari, Emmanuel Pistono, Sylvain Bourdel

Proceedings of the 36th IEEE VLSI Test Symposium, 2018

2017

Analysis of an efficient on-chip servo-loop technique for reduced-code static linearity test of pipeline ADCs.

Guillaume Renaud, Marc Margalef-Rovira, Manuel J. Barragán, Salvador Mir

Proceedings of the 35th IEEE VLSI Test Symposium, 2017