Marcel Baláz

According to our database, Marcel Baláz authored at least 23 papers between 2006 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Intelligent Monitoring System for Universal Data Collection and Analysis.

Ondrej Kachman, Jakub Findura, Marcel Baláz, Gábor Gyepes, Libor Majer, Marian Vojs

Proceedings of the 32nd International Conference Radioelektronika, 2022

2020

Efficient Patch Module for Single-bank or Dual-bank Firmware Updates for Embedded Devices.

Ondrej Kachman, Marcel Baláz

Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2020

2019

Universal framework for remote firmware updates of low-power devices.

Ondrej Kachman, Marcel Baláz, Peter Malík

Comput. Commun., 2019

2018

Hardware redundancy architecture based on reconfigurable logic blocks with persistent high reliability improvement.

Stefan Kristofík, Marcel Baláz, Peter Malík

Microelectron. Reliab., 2018

2017

Configurable Reprogramming Methodology for Embedded Low-Power Devices.

Ondrej Kachman, Marcel Baláz

Proceedings of the Technological Innovation for Smart Systems, 2017

Firmware Update Manager: A remote firmware reprogramming tool for low-power devices.

Ondrej Kachman, Marcel Baláz

Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

2016

Effective Over-the-Air Reprogramming for Low-Power Devices in Cyber-Physical Systems.

Ondrej Kachman, Marcel Baláz

Proceedings of the Technological Innovation for Cyber-Physical Systems, 2016

Built-in self-repair architecture generator for digital cores.

Stefan Kristofík, Marcel Baláz

Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

Optimized differencing algorithm for firmware updates of low-power devices.

Ondrej Kachman, Marcel Baláz

Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

2015

Generic Self Repair Architecture with Multiple Fault Handling Capability.

Marcel Baláz, Stefan Kristofík

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Generic Self Repair Architecture with On-Line Fault Diagnosis.

Stefan Kristofík, Marcel Baláz, Mária Fischerová

Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

2014

Case study: BISR for a processor multiplier.

Andrej Kincel, Marcel Baláz

Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

Generic built-in self-repair architectures for SoC logic cores.

Marcel Baláz, Stefan Kristofík, Mária Fischerová

Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

2013

SAT-based generation of compressed skewed-load tests for transition delay faults.

Roland Dobai, Marcel Baláz

Microprocess. Microsystems, 2013

Compressed Skewed-Load Delay Test Generation Based on Evolution and Deterministic Initialization of Populations.

Roland Dobai, Marcel Baláz

Comput. Informatics, 2013

MBIST for LEON3 processor core cache.

Andrej Kincel, Marcel Baláz

Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

2012

Automated Generation of Built-In Self-Repair Architectures for Random Logic SoC Cores.

Roland Dobai, Marcel Baláz, Mária Fischerová

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Genetic method for compressed skewed-load delay test generation.

Roland Dobai, Marcel Baláz

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2009

MDCT / IMDCT low power implementations in 90 nm CMOS technology for MP3 audio.

Peter Malík, Michal Ufnal, Arkadiusz W. Luczyk, Marcel Baláz, Witold A. Pleskacz

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008

Various MDCT implementations in 0.35µm CMOS.

Peter Malík, Marcel Baláz, Martin Simlastík, Arkadiusz W. Luczyk, Witold A. Pleskacz

Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2007

An Improved MDCT IP Core Generator with Architectural Model Simulation.

Peter Malík, Marcel Baláz, Tomás Pikula, Martin Simlastík

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006

MDCT IP Core Generator with Architectural Model Simulation.

Peter Malík, Marcel Baláz, Tomás Pikula, Martin Simlastík

Proceedings of the IFIP VLSI-SoC 2006, 2006

FPGA Implementation of a Fast MDCT Algorithm.

Martin Simlastík, Peter Malík, Tomás Pikula, Marcel Baláz

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006