Marcio Merino Fernandes

According to our database1, Marcio Merino Fernandes authored at least 19 papers between 1996 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

Online presence:

On csauthors.net:

Bibliography

2018
SeMiner: A Flexible Sequence Miner Method to Forecast Solar Time Series.
Inf., 2018

2015
CHAOS-MCAPI: An Optimized Mechanism to Support Multicore Parallel Programming.
Proceedings of the 2015 International Symposium on Computer Architecture and High Performance Computing Workshops, 2015

2014
Practical Education Fostered by Research Projects in an Embedded Systems Course.
Int. J. Reconfigurable Comput., 2014

Automatic Generation of Custom Parallel Processors for Morphological Image Processing.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014

From MultiTask to MultiCore: Design and Implementation Using an RTOS.
Proceedings of the IEEE 13th International Symposium on Parallel and Distributed Computing, 2014

2013
A Mersenne Twister Hardware Implementation for the Monte Carlo Localization Algorithm.
J. Signal Process. Syst., 2013

2012
LALP: A Language to Program Custom FPGA-Based Acceleration Engines.
Int. J. Parallel Program., 2012

2009
LALP: A Novel Language to Program Custom FPGA-Based Architectures.
Proceedings of the 21st International Symposium on Computer Architecture and High Performance Computing, 2009

Automatic generation of FPGA hardware accelerators using a domain specific language.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008
A Software Framework to Create 3D Browser-Based Speech Enabled Applications.
RITA, 2008

Poster: A Software Framework for Easy Integration of Speech Recognition into 3D Browsers.
Proceedings of the IEEE Symposium on 3D User Interfaces, 2008

2004
Teaching embedded systems with FPGAs throughout a computer science course.
Proceedings of the 2004 workshop on Computer architecture education, 2004

A Real Time Gesture Recognition System for Mobile Robots.
Proceedings of the ICINCO 2004, 2004

2003
ARCHITECT-R: A System for Reconfigurable Robots Design.
Proceedings of the 2003 ACM Symposium on Applied Computing (SAC), 2003

1999
Distributed Modulo Scheduling.
Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

1998
A clustered VLIW architecture based on queue register files.
PhD thesis, 1998

Partitioned Schedules for Clustered VLIW Architectures.
Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998

1997
Allocating Lifetimes to Queues in Software Pipelined Architectures.
Proceedings of the Euro-Par '97 Parallel Processing, 1997

1996
Analytical Performance Modelling of the CPER Multiprocessor.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996


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