Masaaki Mihara

According to our database, Masaaki Mihara authored at least 2 papers between 1992 and 1999.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1999

A 29-mm², 1.8-V-only, 16-Mb DINOR flash memory with gate-protected-poly-diode (GPPD) charge pump.

Yoshikazu Miyawaki, Osamu Ishizaki, Yoshihiko Okihara, Tsutomu Inaba, Fumihiko Nitta, Masaaki Mihara, Takashi Hayasaka, Kazuo Kobayashi, Tadashi Omae, Hiroshi Kimura, Satoshi Shimizu, Hiromi Makimoto, Yoshiki Kawajiri, Masashi Wada, Hirofumi Sonoyama, Jun Etoh

IEEE J. Solid State Circuits, 1999

1992

A 288-kb fully parallel content addressable memory using a stacked-capacitor cell structure.

Tadato Yamagata, Masaaki Mihara, Takeshi Hamamoto, Yasumitsu Murai, Toshifumi Kobayashi, Michihiro Yamada, Hideyuki Ozaki

IEEE J. Solid State Circuits, December, 1992