Masanori Izumikawa

According to our database, Masanori Izumikawa authored at least 3 papers between 1994 and 1997.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

1997

A 0.25-μm CMOS 0.9-V 100-MHz DSP core.

Masanori Izumikawa, Hiroyuki Igura, Hitoshi Wakabayashi, Ken Nakajima, Tohru Mogami, Tadahiko Horiuchi, Masakazu Yamashina

IEEE J. Solid State Circuits, 1997

1996

A current direction sense technique for multiport SRAM's.

Masanori Izumikawa, Masakazu Yamashina

IEEE J. Solid State Circuits, 1996

1994

A 500 MHz, 32 bit, 0.4 μm CMOS RISC processor.

Kazumasa Suzuki, Masakazu Yamashina, Takashi Nakayama, Masanori Izumikawa, Masahiro Nomura, Hiroyuki Igura, Hideki Heiuchi, Junichi Goto, Toshiaki Inoue, Youichi Koseki, Hitoshi Abiko, Kazuhiro Okabe, Atsuki Ono, Youich Yano, Hachiro Yamada

IEEE J. Solid State Circuits, December, 1994