Masanori Muroyama

Orcid: 0000-0002-6808-5106

According to our database1, Masanori Muroyama authored at least 19 papers between 2002 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Micromechanical Force Sensor Using the Stress-Impedance Effect of Soft Magnetic FeCuNbSiB.
Sensors, 2021

2020
Development of a Real-Time Force and Temperature Sensing System with MEMS-LSI Integrated Tactile Sensors for Next-Generation Robots.
J. Robotics Mechatronics, 2020

2018
Electrical Design and Evaluation of Asynchronous Serial Bus Communication Network of 48 Sensor Platform LSIs with Single-Ended I/O for Integrated MEMS-LSI Sensors.
Sensors, 2018

Design and Fabrication Technology of Low Profile Tactile Sensor with Digital Interface for Whole Body Robot Skin.
Sensors, 2018

2017
A Tactile Sensor Network System Using a Multiple Sensor Platform with a Dedicated CMOS-LSI for Robot Applications.
Sensors, 2017

3-Axis Fully-Integrated Capacitive Tactile Sensor with Flip-Bonded CMOS on LTCC Interposer.
Sensors, 2017

2016
A multiple sensor platform with dedicated CMOS-LSIs for robot applications.
Proceedings of the 11th IEEE Annual International Conference on Nano/Micro Engineered and Molecular Systems, 2016

Fabrication of through silicon via with highly phosphorus-doped polycrystalline Si plugs for driving an active-matrix nanocrystalline Si electron emitter array.
Proceedings of the 11th IEEE Annual International Conference on Nano/Micro Engineered and Molecular Systems, 2016

2015
Delay window blind oversampling clock and data recovery algorithm with wide tracking range.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2008
AMPLE: An Adaptive Multi-Performance Processor for Low-Energy Embedded Applications.
Proceedings of the IEEE Symposium on Application Specific Processors, 2008

Analysis of Effects of Input Arrival Time Variations on On-Chip Bus Power Consumption.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008

2006
A Simulation-Based Soft Error Estimation Methodology for Computer Systems.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

An Energy Characterization Framework for Software-Based Embedded Systems.
Proceedings of the 2006 4th Workshop on Embedded Systems for Real-Time Multimedia, 2006

2005
Bitwidth Optimization for Low Power Digital FIR Filter Design.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

A variation-aware low-power coding methodology for tightly coupled buses.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2003
Variable Pipeline Depth Processor for Energy Efficient Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

A Power Reduction Scheme for Data Buses by Dynamic Detection of Active Bits.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

2002
A Power Minimization Technique for Arithmetic Circuits by Cell Selection.
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

Reducing access energy of on-chip data memory considering active data bitwidth.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002


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