Yuriko Ishitobi

According to our database, Yuriko Ishitobi authored at least 4 papers between 2007 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2010

Code and Data Placement for Embedded Processors with Scratchpad and Cache Memories.

Yuriko Ishitobi, Tohru Ishihara, Hiroto Yasuura

J. Signal Process. Syst., 2010

2009

Single-Cycle-Accessible Two-Level Caches and Compilation Technique for Energy Reducion.

Seiichiro Yamaguchi, Yuriko Ishitobi, Tohru Ishihara, Hiroto Yasuura

IPSJ Trans. Syst. LSI Des. Methodol., 2009

2008

AMPLE: An Adaptive Multi-Performance Processor for Low-Energy Embedded Applications.

Tohru Ishihara, Seiichiro Yamaguchi, Yuriko Ishitobi, Tadayuki Matsumura, Yuji Kunitake, Yuichiro Oyama, Yusuke Kaneda, Masanori Muroyama, Toshinori Sato

Proceedings of the IEEE Symposium on Application Specific Processors, 2008

2007

Code Placement for Reducing the Energy Consumption of Embedded Processors with Scratchpad and Cache Memories.

Yuriko Ishitobi, Tohru Ishihara, Hiroto Yasuura

Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, 2007