Masaru Fukushi

Orcid: 0000-0003-0071-6263

According to our database1, Masaru Fukushi authored at least 63 papers between 2000 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2023
Performance Evaluation of Parallel Tasks for Fault-tolerant Routing Methods.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023

Accuracy improvement of stock price forecasting using Prophet.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023

2022
Degradable Self-restructuring of Processor Arrays by Direct Spare Replacement.
Trans. Comput. Sci., 2022

A Dynamic Reconfiguration Method of Communication Groups for Parallel Volunteer Computing.
Proceedings of the International Conference on Networking and Network Applications, 2022

Performance Evaluation of Fault-Tolerant Routing Methods Using Parallel Programs.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022

2021
Self-restructuring of Mesh-Connected Processor Arrays with Spares Assigned on Rotated Orthogonal Side.
Trans. Comput. Sci., 2021

Covert Communication in Relay-Assisted IoT Systems.
IEEE Internet Things J., 2021

A Fault-tolerant Routing Method for 2D-torus Network-on-Chips Based on Bus Functions.
Proceedings of the 20th International Symposium on Communications and Information Technologies, 2021

A Fault-Tolerant Routing Method Using Bus Functions in Two-dimensional Torus Network-on-Chips.
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021

A Development Support Tool for Fault-tolerant Routing Methods on Network-on-Chips.
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021

2020
A degradable NoC router for the improvement of fault-tolerant routing performance.
Artif. Life Robotics, 2020

A Fault-Tolerant Adaptive Routing Method Based on the Passage of Faulty Nodes.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020

A Parallel Volunteer Computing Based on Server Assisted Communications.
Proceedings of the Eighth International Symposium on Computing and Networking Workshops, 2020

2019
A Built-In Circuit for Self-reconfiguring Mesh-Connected Processor Arrays with Spares on Diagonal.
Trans. Comput. Sci., 2019

Design of an extended 2D mesh network-on-chip and development of A fault-tolerant routing method.
IET Comput. Digit. Tech., 2019

Passage of Faulty Nodes: A Novel Approach for Fault-Tolerant Routing on NoCs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019

Performance Improvement of Region-Based Fault-Tolerant Routing Methods Based on the Passage of Fault Blocks.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019

A GPU Implementation Method of Deep Neural Networks Based on Data Swapping.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019

2018
Restructuring Mesh-Connected Processor Arrays with Spares on Four Sides by Orthogonal Side Rotation.
Proceedings of the 23rd IEEE Pacific Rim International Symposium on Dependable Computing, 2018

Degradable Restructuring of Mesh-Connected Processor Arrays with Spares on Orthogonal Sides.
Proceedings of the 23rd IEEE Pacific Rim International Symposium on Dependable Computing, 2018

XY Based Fault-Tolerant Routing with the Passage of Faulty Nodes.
Proceedings of the Sixth International Symposium on Computing and Networking, 2018

A Network-Based Event Detection Module Using NTP for Cyber Attacks on IoT.
Proceedings of the Sixth International Symposium on Computing and Networking, 2018

2017
A Built-in Circuit for Self-Repairing Mesh-Connected Processor Arrays with Spares on Diagonal.
Proceedings of the 22nd IEEE Pacific Rim International Symposium on Dependable Computing, 2017

2016
A Reliable Volunteer Computing System with Credibility-based Voting.
J. Inf. Process., 2016

A prototype router circuit for extended 2D mesh network on chips.
Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

A fault-tolerant routing method for 2D-mesh Network-on-Chips based on components of a router.
Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

2015
Dynamic Job Scheduling Method Based on Expected Probability of Completion of Voting in Volunteer Computing.
IEICE Trans. Inf. Syst., 2015

An implementation of credibility-based job scheduling method in volunteer computing systems.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015

A performance evaluation of Web-based volunteer computing using applications with GMP.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015

A Group-Based Job Scheduling Method for Parallel Volunteer Computing.
Proceedings of the Third International Symposium on Computing and Networking, 2015

2014
A peer-to-peer communication function among Web browsers for Web-based Volunteer Computing.
Proceedings of the 14th International Symposium on Communications and Information Technologies, 2014

Implementation and evaluation of credibility-based voting for volunteer computing systems.
Proceedings of the 14th International Symposium on Communications and Information Technologies, 2014

A Memory Efficient Parallel Method for Voxel-Based Multiview Stereo.
Proceedings of the Second International Symposium on Computing and Networking, 2014

Implementation of a Reliable Volunteer Computing System with Credibility-Based Voting.
Proceedings of the Second International Symposium on Computing and Networking, 2014

A Job Scheduling Method Based on Expected Probability of Completion of Voting in Volunteer Computing.
Proceedings of the Second International Symposium on Computing and Networking, 2014

2013
A Region-based Fault-Tolerant Routing Algorithmfor 2D Irregular Mesh Network-on-Chip.
J. Electron. Test., 2013

Optimal Spot-Checking for Delayed Attack on Desktop Grid Systems.
Proceedings of the 15th International Conference on Computer Modelling and Simulation, 2013

Primitive Human Action Recognition Based on Partitioned Silhouette Block Matching.
Proceedings of the Advances in Visual Computing - 9th International Symposium, 2013

Hierarchical Tori Connected Mesh Network.
Proceedings of the Computational Science and Its Applications - ICCSA 2013, 2013

2012
Parallelization of voxel based multiview stereo for arbitrarily configured viewpoints.
Proceedings of the 19th IEEE International Conference on Image Processing, 2012

2011
Adaptive Group-Based Job Scheduling for High Performance and Reliable Volunteer Computing.
J. Inf. Process., 2011

Route-Aware Task Mapping Method for Fault-Tolerant 2D-Mesh Network-on-Chips.
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

2010
Expected-Credibility-Based Job Scheduling for Reliable Volunteer Computing.
IEICE Trans. Inf. Syst., 2010

Generalized Spot-Checking for Reliable Volunteer Computing.
IEICE Trans. Inf. Syst., 2010

A parallelization method for multi-stereo 3D shape reconstruction.
Proceedings of the International Conference on Image Processing, 2010

A Hardware-Oriented Fault-Tolerant Routing Algorithm for Irregular 2D-Mesh Network-on-Chip without Virtual Channels.
Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

Generalized Spot-Checking for Sabotage-Tolerance in Volunteer Computing Systems.
Proceedings of the 10th IEEE/ACM International Conference on Cluster, 2010

2009
Optimal Spot-checking for Computation Time Minimization in Volunteer Computing.
J. Grid Comput., 2009

An Efficient Framework for Scalable Defect Isolation in Large Scale Networks of DNA Self-Assembly.
J. Electron. Test., 2009

Collusion-Resistant Sabotage-Tolerance Mechanisms for Volunteer Computing Systems.
Proceedings of the 2009 IEEE International Conference on e-Business Engineering, 2009

Fault-Tolerant Routing Algorithm for Network on Chip without Virtual Channels.
Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

2008
Optimal spot-checking to minimize the computation time in volunteer computing.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Efficient Scheduling Schemes for Sabotage-Tolerance in Volunteer Computing Systems.
Proceedings of the 22nd International Conference on Advanced Information Networking and Applications, 2008

2007
A Scalable Framework for Defect Isolation of DNA Self-assemlbled Networks.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

2006
An Improved Reconfiguration Method for Degradable Processor Arrays Using Genetic Algorithm.
Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006

2005
A Probabilistic Sentence Reduction Using Maximum Entropy Model.
IEICE Trans. Inf. Syst., 2005

A Genetic Approach for the Reconfiguration of Degradable Processor Arrays.
Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

2004
A self-reconfigurable hardware architecture for mesh arrays using single/double vertical track switches.
IEEE Trans. Instrum. Meas., 2004

Self-Reconfigurable Multi-Layer Neural Networks with Genetic Algorithms.
IEICE Trans. Inf. Syst., 2004

Reconfiguration Algorithm for Degradable Processor Arrays Based on Row and Column Rerouting.
Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004

Probabilistic Sentence Reduction Using Support Vector Machines.
Proceedings of the COLING 2004, 2004

2003
Fault Tolerant Multi-Layer Neural Networks with GA Training.
Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003

2000
Self-Reconfigurable Mesh Array System on FPGA.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000


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