Matthew J. Turnquist

According to our database1, Matthew J. Turnquist authored at least 9 papers between 2009 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
A 0.4-0.9V, 2.87pJ/cycle Near-Threshold ARM Cortex-M3 CPU with In-Situ Monitoring and Adaptive-Logic Scan.
Proceedings of the 2020 IEEE Symposium in Low-Power and High-Speed Chips, 2020

2016
Implementing Minimum-Energy-Point Systems With Adaptive Logic.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2015
Fully integrated DC-DC converter and a 0.4V 32-bit CPU with timing-error prevention supplied from a prototype 1.55V Li-ion battery.
Proceedings of the Symposium on VLSI Circuits, 2015

A fully integrated self-oscillating switched-capacitor DC-DC converter for near-threshold loads.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2014
A 3.15pJ/cyc 32-bit RISC CPU with timing-error prevention and adaptive clocking in 28nm CMOS.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013
Rethinking DC-DC converter design constraints for adaptable systems that target the minimum-energy point.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

2012
Adaptive subthreshold timing-error detection 8 bit microcontroller in 65 nm CMOS.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
Measurement of a system-adaptive error-detection sequential circuit with subthreshold SCL.
Proceedings of the 2011 NORCHIP, Lund, Sweden, November 14-15, 2011, 2011

2009
Adaptive Sub-Threshold Test Circuit.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009


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