Matthias Eireiner

According to our database, Matthias Eireiner authored at least 5 papers between 2005 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2009

Adaptive circuit block model for power supply noise analysis of low power system-on-chip.

Matthias Eireiner, Doris Schmitt-Landsiedel, Paul Wallner, Andreas Schöne, Stephan Henzler, Ulrich Fiedler

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

2007

In-Situ Delay Characterization and Local Supply Voltage Adjustment for Compensation of Local Parametric Variations.

Matthias Eireiner, Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel

IEEE J. Solid State Circuits, 2007

2006

Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead.

Stephan Henzler, Georg Georgakos, Matthias Eireiner, Thomas Nirschl, Christian Pacha, Jörg Berthold, Doris Schmitt-Landsiedel

IEEE J. Solid State Circuits, 2006

2005

Dynamic state-retention flip flop for fine-grained sleep-transistor scheme.

Stephan Henzler, Thomas Nirschi, Christian Pacha, Peter Spindler, Philip Teichmann, Michael Fulde, Jürgen Fischer, Matthias Eireiner, Thomas Fischer, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel

Proceedings of the 31st European Solid-State Circuits Conference, 2005

Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits.

Stephan Henzler, Thomas Nirschl, Matthias Eireiner, Ettore Amirante, Doris Schmitt-Landsiedel

Proceedings of the Second Conference on Computing Frontiers, 2005