Christian Pacha
According to our database1,
Christian Pacha
authored at least 24 papers
between 1997 and 2016.
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Bibliography
2016
Thermal issues in test: An overview of the significant aspects and industrial practice.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016
2009
Architectural assessment of design techniques to improve speed and robustness in embedded microprocessors.
Proceedings of the 46th Design Automation Conference, 2009
2007
A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions.
IEEE J. Solid State Circuits, 2007
Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies.
Proceedings of the IFIP VLSI-SoC 2007, 2007
Proceedings of the 2007 IEEE International SOC Conference, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
Performance improvement of embedded low-power microprocessor cores by selective flip flop replacement.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
2006
Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead.
IEEE J. Solid State Circuits, 2006
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
A 90nm CMOS low-power GSM/EDGE multimedia-enhanced baseband processor with 380MHz ARM9 and mixed-signal extensions.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
2005
IEEE J. Solid State Circuits, 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
2003
Int. J. Circuit Theory Appl., 2003
2002
Asynchronous Circuit Design Based on the RTBT Monostable-Bistable Logic Transition Element (MOBILE).
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
2001
Proceedings of the 31st IEEE International Symposium on Multiple-Valued Logic, 2001
2000
IEEE Trans. Very Large Scale Integr. Syst., 2000
Manufacturability and robust design of nanoelectronic logic circuits based on resonant tunnelling diodes.
Int. J. Circuit Theory Appl., 2000
Digital Circuit Design Based on the Resonant-Tunneling-Hetero-Junction-Bipolar-Transistor.
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
1999
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999
Proceedings of the Computational Intelligence, 1999
1997