Thomas Nirschl

According to our database1, Thomas Nirschl authored at least 8 papers between 2003 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2006
Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead.
IEEE J. Solid State Circuits, 2006

Circuit design issues in multi-gate FET CMOS technologies.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005
Impact of process parameter variations on the energy dissipation in adiabatic logic.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits.
Proceedings of the Second Conference on Computing Frontiers, 2005

2004
Yield and speed optimization of a latch-type voltage sense amplifier.
IEEE J. Solid State Circuits, 2004

The tunnelling field effect transistors (TFET): the temperature dependence, the simulation model, and its application.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
MALTY--A memory test structure for analysis in the early phase of the technology development.
Microelectron. Reliab., 2003

A yield-optimized latch-type SRAM sense amplifier.
Proceedings of the ESSCIRC 2003, 2003


  Loading...