Georg Georgakos
According to our database1,
Georg Georgakos
authored at least 26 papers
between 2003 and 2019.
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Bibliography
2019
Proceedings of the IEEE International Reliability Physics Symposium, 2019
2017
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017
2016
Proceedings of the 21th IEEE European Test Symposium, 2016
2015
A fWLR test structure and method for device reliability monitoring using product relevant circuits.
Proceedings of the IEEE International Reliability Physics Symposium, 2015
2014
Power efficient digital IC design for a medical application with high reliability requirements.
Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014
From an analytic NBTI device model to reliability assessment of complex digital circuits.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
2013
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
Reliability challenges for electric vehicles: from devices to architecture and systems software.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
2012
On-Line Supply voltage Scaling Based on <i>in situ</i> Delay Monitoring to Adapt for Pvta variations.
J. Circuits Syst. Comput., 2012
Adaptive voltage scaling by in-situ delay monitoring for an image processing circuit.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012
2011
A variation-aware adaptive voltage scaling technique based on in-situ delay monitoring.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011
2010
Aging-aware Timing Analysis of Combinatorial Circuits on Gate Level (Alterungsanalyse von kombinatorischen Schaltungen auf Gatterebene).
it Inf. Technol., 2010
2009
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Fast stability analysis of large-scale SRAM arrays and the impact of NBTI degradation.
Proceedings of the 35th European Solid-State Circuits Conference, 2009
2008
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
2007
A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions.
IEEE J. Solid State Circuits, 2007
In-Situ Delay Characterization and Local Supply Voltage Adjustment for Compensation of Local Parametric Variations.
IEEE J. Solid State Circuits, 2007
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
2006
Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead.
IEEE J. Solid State Circuits, 2006
A 90nm CMOS low-power GSM/EDGE multimedia-enhanced baseband processor with 380MHz ARM9 and mixed-signal extensions.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
2004
Two Level Compact Simulation Methodology for Timing Analysis of Power-Switched Circuits.
Proceedings of the Integrated Circuit and System Design, 2004
Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption.
Proceedings of the Integrated Circuit and System Design, 2004
2003
Proceedings of the VLSI-SOC: From Systems to Chips, 2003
Design Aspects and Technological Scaling Limits of ZigZag Circuit Block Switch-Off Schemes.
Proceedings of the IFIP VLSI-SoC 2003, 2003