Mattia Cacciotti

Orcid: 0000-0002-6038-7302

According to our database1, Mattia Cacciotti authored at least 5 papers between 2017 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
Exploiting Errors for Efficiency: A Survey from Circuits to Applications.
ACM Comput. Surv., 2021

2018
Design of Approximate Circuits by Fabrication of False Timing Paths: The Carry Cut-Back Adder.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Exploiting Errors for Efficiency: A Survey from Circuits to Algorithms.
CoRR, 2018

Hardware Acceleration of HDR-Image Tone Mapping on an FPGA-CPU Platform Through High-Level Synthesis.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

2017
Combining structural and timing errors in overclocked inexact speculative adders.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017


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