Mauro Mirandola

According to our database1, Mauro Mirandola authored at least 3 papers between 2005 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2007
3-D Capacitive Interconnections for Wafer-Level and Die-Level Assembly.
IEEE J. Solid State Circuits, 2007

2005
Electrical measurement of alignment for 3D stacked chips.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

A 0.14mW/Gbps high-density capacitive interface for 3D system integration.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005


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