Léa Di Cioccio

According to our database1, Léa Di Cioccio authored at least 13 papers between 2007 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2014
Advances toward reliable high density Cu-Cu interconnects by Cu-SiO<sub>2</sub> direct hybrid bonding.
Proceedings of the 2014 International 3D Systems Integration Conference, 2014

2013
Smart Stacking™ and Smart Cut™ technologies for wafer level 3D integration.
Proceedings of 2013 International Conference on IC Design & Technology, 2013

Novel low temperature 3D wafer stacking technology for high density device integration.
Proceedings of the European Solid-State Device Research Conference, 2013

Chip to wafer copper direct bonding electrical characterization and thermal cycling.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

2012
Low temperature direct bonding: An attractive technique for heterostructures build-up.
Microelectron. Reliab., 2012

2011
Impact of containment and deposition method on sub-micron chip-to-wafer self-assembly yield.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

200°C direct bonding copper interconnects : Electrical results and reliability.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2010
Recent Developments of Cu-Cu non-thermo compression bonding for wafer-to-wafer 3D stacking.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

2009
System on Wafer: A New Silicon Concept in SiP.
Proc. IEEE, 2009

First integration of Cu TSV using die-to-wafer direct bonding and planarization.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

An innovative die to wafer 3D integration scheme: Die to wafer oxide or copper direct bonding with planarised oxide inter-die filling.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

2007
3-D Capacitive Interconnections for Wafer-Level and Die-Level Assembly.
IEEE J. Solid State Circuits, 2007

3D Capacitive Interconnections for High Speed Interchip Communication.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007


  Loading...